公开(公告)号：US20230027508A1

公开(公告)日：2023-01-26

申请号：US17396493

申请日：2021-08-06

Applicant: United Microelectronics Corp.

Inventor： Kai Jiun Chang ,  Chun-Hung Cheng ,  Chuan-Fu Wang

IPC: H01L45/00

Abstract: Provided are a resistive random access memory (RRAM) and a manufacturing method thereof. The resistive random access memory includes multiple unit structures disposed on a substrate. Each of the unit structures includes a first electrode, a first metal oxide layer, and a spacer. The first electrode is disposed on the substrate. The first metal oxide layer is disposed on the first electrode. The spacer is disposed on sidewalls of the first electrode and the first metal oxide layer. In addition, the resistive random access memory includes a second metal oxide layer and a second electrode. The second metal oxide layer is disposed on the unit structures and is connected to the unit structures. The second electrode is disposed on the second metal oxide layer.

公开(公告)号：US11882773B2

公开(公告)日：2024-01-23

申请号：US17396493

申请日：2021-08-06

Applicant: United Microelectronics Corp.

Inventor： Kai Jiun Chang ,  Chun-Hung Cheng ,  Chuan-Fu Wang

IPC: H10N70/00 ,  H10N70/20

CPC classification number: H10N70/828 ,  H10N70/023 ,  H10N70/063 ,  H10N70/24 ,  H10N70/841 ,  H10N70/8833 ,  H10N70/8836

Abstract: Provided are a resistive random access memory (RRAM) and a manufacturing method thereof. The resistive random access memory includes multiple unit structures disposed on a substrate. Each of the unit structures includes a first electrode, a first metal oxide layer, and a spacer. The first electrode is disposed on the substrate. The first metal oxide layer is disposed on the first electrode. The spacer is disposed on sidewalls of the first electrode and the first metal oxide layer. In addition, the resistive random access memory includes a second metal oxide layer and a second electrode. The second metal oxide layer is disposed on the unit structures and is connected to the unit structures. The second electrode is disposed on the second metal oxide layer.

公开(公告)号：US20240107901A1

公开(公告)日：2024-03-28

申请号：US18528826

申请日：2023-12-05

Applicant: United Microelectronics Corp.

Inventor： Kai Jiun Chang ,  Chun-Hung Cheng ,  Chuan-Fu Wang

IPC: H10N70/00 ,  H10N70/20

CPC classification number: H10N70/828 ,  H10N70/023 ,  H10N70/063 ,  H10N70/24 ,  H10N70/841 ,  H10N70/8833 ,  H10N70/8836

Abstract: Provided is a resistive random access memory (RRAM). The resistive random access memory includes a plurality of unit structures disposed on a substrate. Each of the unit structures includes a first electrode, and a first metal oxide layer. The first electrode is disposed on the substrate. The first metal oxide layer is disposed on the first electrode. In addition, the resistive random access memory includes a second electrode. The second electrode is disposed on the plurality of unit structures and connected to the plurality of unit structures.