公开(公告)号：US12079334B2

公开(公告)日：2024-09-03

申请号：US17543940

申请日：2021-12-07

Applicant: University of Florida Research Foundation, Inc.

Inventor： Prabhat Kumar Mishra ,  Zhixin Pan

IPC: G06F21/55 ,  G06N20/00

CPC classification number: G06F21/554 ,  G06N20/00 ,  G06F2221/034

Abstract: The present disclosure provides systems and methods for test pattern generation to detect a hardware Trojan. One such method includes determining, by a computing device, a set of initial test patterns to activate the hardware Trojan within an integrated circuit design; evaluating nodes of the integrated circuit design and assigning a rareness attribute value and a testability attribute value associated with respective nodes of the integrated circuit design; and generating a set of additional test patterns to activate the hardware Trojan within the integrated circuit design using a reinforcement learning model. The set of initial test patterns is applied as an input along with rareness attribute values and testability attribute values associated with the nodes of the integrated circuit, and the reinforcement learning model is trained with a stochastic learning scheme to identify optimal test patterns for triggering nodes of the integrated circuit design.

公开(公告)号：US11829475B2

公开(公告)日：2023-11-28

申请号：US17500016

申请日：2021-10-13

Applicant: University of Florida Research Foundation, Inc.

Inventor： Prabhat Kumar Mishra ,  Zhixin Pan ,  Jennifer M. Sheldon

IPC: G06F21/56 ,  G06N3/04 ,  G06F18/2433 ,  G06F21/57 ,  G06F21/00

CPC classification number: G06F21/567 ,  G06F18/2433 ,  G06F21/566 ,  G06F21/577 ,  G06N3/04

Abstract: The present disclosure describes systems and methods for hardware-assisted malware detection. One such system comprises a memory; and a hardware processor of a computing device operatively coupled to the memory. The hardware processor is configured to execute a software application suspected of being malware; monitor behavior of the software application at run-time; and acquire an input time sequence of data records based on a trace analysis of the software application, wherein the input time sequence comprises a plurality of features of the software application. The hardware processor is further configured to classify the software application as being a malicious software application based on the plurality of features of the software application; and output a ranking of a subset plurality of features by their respective contributions towards the classification of the software application as being malicious software.

公开(公告)号：US11775693B1

公开(公告)日：2023-10-03

申请号：US17543034

申请日：2021-12-06

Applicant: University of Florida Research Foundation, Inc.

Inventor： Prabhat Kumar Mishra ,  Jennifer Marie Sheldon ,  Zhixin Pan

IPC: G06F21/76 ,  G06F21/54 ,  G06F30/333 ,  G06F21/55 ,  G06N3/08

CPC classification number: G06F21/76 ,  G06F21/54 ,  G06F21/554 ,  G06F21/556 ,  G06F30/333 ,  G06N3/08

Abstract: The present disclosure describes systems and methods for test pattern generation to detect a hardware Trojan using delay-based analysis. One such method comprises determining a set of initial test patterns to activate the hardware Trojan within an integrated circuit design; and generating a set of succeeding test patterns to activate the hardware Trojan within the integrated circuit design using a reinforcement learning model. The set of initial test patterns can be applied as an input to the reinforcement learning model. Further, the reinforcement learning model can be trained with a stochastic learning scheme to increase a probability of triggering one or more rare nodes in the integrated circuit design and identify optimal test vectors to maximize delay-based side-channel sensitivity when the hardware Trojan is activated in the integrated circuit design. Other methods and systems are also provided.

公开(公告)号：US20220188415A1

公开(公告)日：2022-06-16

申请号：US17543940

申请日：2021-12-07

Applicant: University of Florida Research Foundation, Inc.

Inventor： Prabhat Kumar Mishra ,  Zhixin Pan

IPC: G06F21/55 ,  G06N20/00

Abstract: The present disclosure provides systems and methods for test pattern generation to detect a hardware Trojan. One such method includes determining, by a computing device, a set of initial test patterns to activate the hardware Trojan within an integrated circuit design; evaluating nodes of the integrated circuit design and assigning a rareness attribute value and a testability attribute value associated with respective nodes of the integrated circuit design; and generating a set of additional test patterns to activate the hardware Trojan within the integrated circuit design using a reinforcement learning model. The set of initial test patterns is applied as an input along with rareness attribute values and testability attribute values associated with the nodes of the integrated circuit, and the reinforcement learning model is trained with a stochastic learning scheme to identify optimal test patterns for triggering nodes of the integrated circuit design.