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公开(公告)号：US11599395B2
公开(公告)日：2023-03-07
申请号：US16795376
申请日：2020-02-19
Applicant: VMware, Inc.
Inventor： Yong Wang , Mani Kancherla , Kevin Li , Sreeram Ravinoothala , Mochi Xue
Abstract: Some embodiments provide a method for updating a core allocation among processes of a gateway datapath executing on a gateway computing device having multiple cores. The gateway datapath processes include a first set of data message processing processes to which a first set of the cores are allocated and a second set of processes to which a second set of the cores are allocated in a first core allocation. Based on data regarding usage of the cores, the method determines a second core allocation that allocates a third set of the cores to the first set of processes and a fourth set of the cores to the second set of processes. The method updates a load balancing operation to load balance received data messages over the third set of cores rather than the first set of cores. The method reallocates the cores from the first allocation to the second allocation.
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公开(公告)号：US11252070B2
公开(公告)日：2022-02-15
申请号：US16154729
申请日：2018-10-09
Applicant: VMware, Inc.
Inventor： Dexiang Wang , Yong Wang , Peng Li , Sreeram Ravinoothala , Xinghua Hu
IPC: H04L12/26 , H04L12/931 , G06F9/455 , H04L12/715
Abstract: Example methods are provided for a network device to perform adaptive polling in a software-defined networking (SDN) environment. One example method may comprise: operating in a polling mode at a current polling round to detect zero or more packets that require packet processing by the network device. The method may also comprise: determining packet characteristic information associated with multiple polling rounds that include the current polling round and one or more previous polling rounds; and based on the packet characteristic information, determining whether a resource performance condition associated with the network device is satisfied. In response to determination that the resource performance condition is satisfied, the network device may operate in the polling mode at a subsequent polling round; but otherwise, switch from the polling mode to an interrupt mode.
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公开(公告)号：US09509615B2
公开(公告)日：2016-11-29
申请号：US13947952
申请日：2013-07-22
Applicant: VMware, Inc.
Inventor： Sreeram Ravinoothala , Serge Maskalik
IPC: G06F9/50 , H04L12/911 , H04L12/803 , H04L12/823
CPC classification number: H04L47/125 , H04L45/245 , H04L47/32 , Y02D50/30
Abstract: Exemplary methods, apparatuses, and systems include a first host device determining that a first packet from a first virtual machine (VM) within the first host device is to be transmitted to a second VM on a second host device and that the first host device and the second host device each transmit or receive packets via ports within a first link aggregation group (LAG). In response to determining that the first host device and the second host device each transmit or receive packets via ports within the first LAG, the first host device transmits the first packet from a first synchronization port of the first host device to a second synchronization port of the second host device. The first and second synchronization ports are excluded from sharing a common LAG with any ports of another host device.
Abstract translation: 示例性方法，装置和系统包括第一主机设备，确定来自第一主机设备内的第一虚拟机（VM）的第一分组将被发送到第二主机设备上的第二VM，并且第一主机设备和 第二主机设备经由第一链路聚合组（LAG）内的端口发送或接收分组。 响应于确定第一主机设备和第二主机设备各自经由第一LAG内的端口发送或接收分组，第一主机设备将第一分组从第一主机设备的第一同步端口发送到第一同步端口 第二主机设备。 第一和第二同步端口被排除在与另一主机设备的任何端口共享公共LAG之外。
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公开(公告)号：US11483246B2
公开(公告)日：2022-10-25
申请号：US16741457
申请日：2020-01-13
Applicant: VMware, Inc.
Inventor： Yong Wang , Xinhua Hong , Sreeram Ravinoothala , Dexiang Wang
Abstract: Some embodiments provide, for a gateway datapath that executes on a gateway device to implement tenant logical routers for multiple different tenant logical networks and process traffic between the tenant logical networks and an external network, a method for managing QoS for the plurality of tenant logical networks. The method receives a data message for a particular tenant logical network. The method executes a set of processing stages to process the data message. The set of processing stages includes a processing stage for a particular tenant logical router of the particular tenant logical network. As part of the processing stage for the particular tenant logical router, the method uses a QoS data structure specific to the particular tenant logical router to determine whether to allow the data message. The gateway device stores at least one separate QoS data structure for each of a set of the tenant logical routers.
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公开(公告)号：US20220070102A1
公开(公告)日：2022-03-03
申请号：US17008576
申请日：2020-08-31
Applicant: VMware, Inc.
Inventor： Dexiang Wang , Yong Wang , Jerome Catrouillet , Sreeram Ravinoothala
IPC: H04L12/855 , H04L12/66 , H04L29/06 , H04L29/08 , H04L29/12
Abstract: Some embodiments provide a method for a gateway datapath that executes on a gateway device to implement logical routers for a set of logical networks and process traffic between the logical networks and an external network. The method receives a data message at the gateway device. To process the data message, the method executes a set of processing stages that includes a processing stage for a particular logical router. As part of the processing stage for the particular logical router, the method (i) uses an access control list (ACL) table to determine whether the data message is subject to rate limiting controls defined for the particular logical router and (ii) only when the data message is subject to rate limiting controls, determines whether to allow the data message according to a rate limiting mechanism for the particular logical router.
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Patent Agency Ranking
公开(公告)号：US20210218677A1
公开(公告)日：2021-07-15
申请号：US16741457
申请日：2020-01-13
Applicant: VMware, Inc.
Inventor： Yong Wang , Xinhua Hong , Sreeram Ravinoothala , Dexiang Wang
IPC: H04L12/851 , H04L12/66
Abstract: Some embodiments provide, for a gateway datapath that executes on a gateway device to implement tenant logical routers for multiple different tenant logical networks and process traffic between the tenant logical networks and an external network, a method for managing QoS for the plurality of tenant logical networks. The method receives a data message for a particular tenant logical network. The method executes a set of processing stages to process the data message. The set of processing stages includes a processing stage for a particular tenant logical router of the particular tenant logical network. As part of the processing stage for the particular tenant logical router, the method uses a QoS data structure specific to the particular tenant logical router to determine whether to allow the data message. The gateway device stores at least one separate QoS data structure for each of a set of the tenant logical routers.
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公开(公告)号：US09686178B2
公开(公告)日：2017-06-20
申请号：US13947934
申请日：2013-07-22
Applicant: VMware, Inc.
Inventor： Sreeram Ravinoothala , Serge Maskalik
IPC: H04L12/709 , H04L12/803 , H04L12/713 , H04L12/931 , H04L12/935 , H04L12/823
CPC classification number: H04L45/245 , H04L45/586 , H04L47/125 , H04L47/32 , H04L49/30 , H04L49/70 , Y02D50/30
Abstract: Exemplary methods, apparatuses, and systems configure a first set of ports of a host device to be included within a link aggregation group (LAG) with a switch coupled to the first set of one or more ports. A second set of one or more ports of a second host device is also included within the LAG. The configuration of the LAG includes the switch performing load balancing between ports within the LAG. The first host device receives, via the LAG, a packet to be processed by a service implemented by each of one or more virtual machines running on the first host device. The first host device receives the packet as a result of the switch selecting a port within the first and second sets of ports based upon the load balancing between uplinks to the ports within the LAG.
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公开(公告)号：US20230168947A1
公开(公告)日：2023-06-01
申请号：US18103515
申请日：2023-01-31
Applicant: VMware, Inc.
Inventor： Yong Wang , Mani Kancherla , Kevin Li , Sreeram Ravinoothala , Mochi Xue
CPC classification number: G06F9/5083 , G06F9/546
Abstract: Some embodiments provide a method for updating a core allocation among processes of a gateway datapath executing on a gateway computing device having multiple cores. The gateway datapath processes include a first set of data message processing processes to which a first set of the cores are allocated and a second set of processes to which a second set of the cores are allocated in a first core allocation. Based on data regarding usage of the cores, the method determines a second core allocation that allocates a third set of the cores to the first set of processes and a fourth set of the cores to the second set of processes. The method updates a load balancing operation to load balance received data messages over the third set of cores rather than the first set of cores. The method reallocates the cores from the first allocation to the second allocation.
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公开(公告)号：US11539633B2
公开(公告)日：2022-12-27
申请号：US17008576
申请日：2020-08-31
Applicant: VMware, Inc.
Inventor： Dexiang Wang , Yong Wang , Jerome Catrouillet , Sreeram Ravinoothala
IPC: H04L47/2466 , H04L12/66 , H04L69/22 , H04L9/40 , H04L69/326 , H04L61/5007 , H04L101/686
Abstract: Some embodiments provide a method for a gateway datapath that executes on a gateway device to implement logical routers for a set of logical networks and process traffic between the logical networks and an external network. The method receives a data message at the gateway device. To process the data message, the method executes a set of processing stages that includes a processing stage for a particular logical router. As part of the processing stage for the particular logical router, the method (i) uses an access control list (ACL) table to determine whether the data message is subject to rate limiting controls defined for the particular logical router and (ii) only when the data message is subject to rate limiting controls, determines whether to allow the data message according to a rate limiting mechanism for the particular logical router.
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公开(公告)号：US20210255903A1
公开(公告)日：2021-08-19
申请号：US16795376
申请日：2020-02-19
Applicant: VMware, Inc.
Inventor： Yong Wang , Mani Kancherla , Kevin Li , Sreeram Ravinoothala , Mochi Xue
Abstract: Some embodiments provide a method for updating a core allocation among processes of a gateway datapath executing on a gateway computing device having multiple cores. The gateway datapath processes include a first set of data message processing processes to which a first set of the cores are allocated and a second set of processes to which a second set of the cores are allocated in a first core allocation. Based on data regarding usage of the cores, the method determines a second core allocation that allocates a third set of the cores to the first set of processes and a fourth set of the cores to the second set of processes. The method updates a load balancing operation to load balance received data messages over the third set of cores rather than the first set of cores. The method reallocates the cores from the first allocation to the second allocation.
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