公开(公告)号：US11955397B2

公开(公告)日：2024-04-09

申请号：US17092851

申请日：2020-11-09

Applicant: Vanguard International Semiconductor Corporation

Inventor： Shin-Cheng Lin ,  Cheng-Wei Chou ,  Ting-En Hsieh ,  Yi-Han Huang ,  Kwang-Ming Lin ,  Yung-Fong Lin ,  Cheng-Tao Chou ,  Chi-Fu Lee ,  Chia-Lin Chen ,  Shu-Wen Chang

IPC: H01L29/778 ,  H01L23/31 ,  H01L29/66 ,  H01L21/02 ,  H01L23/29 ,  H01L29/20 ,  H01L29/205

CPC classification number: H01L23/3192 ,  H01L23/3171 ,  H01L29/66462 ,  H01L29/7786 ,  H01L29/7787 ,  H01L21/0206 ,  H01L23/291 ,  H01L29/2003 ,  H01L29/205

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.