公开(公告)号：US06633972B2

公开(公告)日：2003-10-14

申请号：US09878062

申请日：2001-06-07

Applicant: Victor Konrad

Inventor： Victor Konrad

IPC: G06F1300

CPC classification number: G06F9/3869

Abstract: A system and method for substituting dynamic pipelines with static queues in a pipelined processor. The system and method are to provide a reduction in power consumption and clock distribution, as well as other advantages.

Abstract translation: 一种在流水线处理器中用静态队列代替动态流水线的系统和方法。 该系统和方法是减少功耗和时钟分配，以及其他优点

公开(公告)号：US08024632B1

公开(公告)日：2011-09-20

申请号：US12008429

申请日：2008-01-11

Applicant: Victor Konrad

Inventor： Victor Konrad

IPC: G01R31/28

CPC classification number: G11C29/003

Abstract: A method and apparatus are provided for detecting faults in a queue (also known as FIFO) in a digital system. The method augments the FIFO with an external monitoring mechanism which, on demand, checks the FIFO's operation and alerts the system to malfunctioning of the FIFO's control mechanism or corruption of data contained therein. The detection apparatus does not depend on the implementation of the FIFO; the checking is based solely on observing the data entering and exiting the FIFO. Furthermore, the apparatus works in a non-intrusive manner during a normal operation of the FIFO as part of the system. The method and apparatus allow for many variants, all derived from the same general scheme, and which allow different levels of protection against faults.

Abstract translation: 提供了用于检测数字系统中的队列（也称为FIFO）中的故障的方法和装置。 该方法使用外部监视机制增加FIFO，该监视机制根据需要检查FIFO的操作，并提醒系统对FIFO控制机制的故障或其中包含的数据的损坏。 检测装置不依赖于FIFO的实现; 检查仅基于观察进入和退出FIFO的数据。 此外，在作为系统的一部分的FIFO的正常操作期间，该装置以非侵入式的方式工作。 该方法和装置允许许多变型，全部来自相同的一般方案，并且允许不同级别的防止故障。

公开(公告)号：US07065732B1

公开(公告)日：2006-06-20

申请号：US09678175

申请日：2000-09-28

Applicant: Victor Konrad ,  Vivek Joshi

Inventor： Victor Konrad ,  Vivek Joshi

IPC: G06F17/50 ,  H03K17/693 ,  H03K19/177

CPC classification number: G06F17/5054

Abstract: A method that includes steps for determining an optimum splitting variable and dividing a programmable logic array (PLA) into a first sub-PLA and a second sub-PLA based on the splitting variable is presented. The method also provides for gating logic to be applied to the first sub-PLA and the second sub-PLA. Power consumption is then controlled in the first sub-PLA and the second sub-PLA so only one of the first sub-PLA and the second sub-PLA contributes to power consumption. In another embodiment, a PLA be recursively divided into a plurality of sub-PLAs.

Abstract translation: 提出了一种方法，其包括用于确定最佳分割变量并基于分割变量将可编程逻辑阵列（PLA）划分为第一子PLA和第二子PLA的步骤。 该方法还提供了门控逻辑应用于第一辅助解决方案和第二辅助解决方案。 然后在第一sub-PLA和第二sub-PLA中控制功率消耗，所以第一sub-PLA和第二sub-PLA中只有一个有助于功耗。 在另一实施例中，PLA被递归地分成多个子PLA。

公开(公告)号：US5870321A

公开(公告)日：1999-02-09

申请号：US672854

申请日：1996-06-28

Applicant: Victor Konrad

Inventor： Victor Konrad

IPC: G06F1/035 ,  G06F7/38

CPC classification number: G06F1/0356 ,  G06F2101/08 ,  G06F2101/12 ,  G06F2207/5355

Abstract: A method and apparatus for implementing mathematical functions of the nature of f(x). The range of values for the value of x (e.g., from 1 to 2 when x is represented in a floating point form) is divided into two intervals. Instead of using a single memory, such as a ROM, to store values for f(x) for the range of values for x, the f(x) values are stored in two such memory devices, one for each of the two subdivided intervals of x. Because the spacing between values for x in the two intervals are different, the combined size of the two memory devices is smaller than the size of a single ROM to achieve the same precision for the value of x. A selector circuit is used to select which of the ROM outputs represents the appropriate value for f(x) based on the value of x. The value for f(x) is then supplied to an optimizing element that implements the Newton-Raphson algorithm which makes the value for f(x) more precise.

Abstract translation: 一种实现f（x）性质的数学函数的方法和装置。 x的值的范围（例如，当以浮点形式表示x时，从1到2）被划分为两个间隔。 代替使用诸如ROM的单个存储器来存储用于x的值的范围的f（x）的值，f（x）值存储在两个这样的存储器设备中，一个用于两个细分间隔 的x。 因为两个间隔中的x的值之间的间隔是不同的，所以两个存储器件的组合大小小于单个ROM的大小以便为x的值获得相同的精度。 选择器电路用于基于x的值来选择哪个ROM输出表示f（x）的适当值。 然后将f（x）的值提供给实现Newton-Raphson算法的优化元素，这使得f（x）的值更精确。