Abstract:
A method that includes steps for determining an optimum splitting variable and dividing a programmable logic array (PLA) into a first sub-PLA and a second sub-PLA based on the splitting variable is presented. The method also provides for gating logic to be applied to the first sub-PLA and the second sub-PLA. Power consumption is then controlled in the first sub-PLA and the second sub-PLA so only one of the first sub-PLA and the second sub-PLA contributes to power consumption. In another embodiment, a PLA be recursively divided into a plurality of sub-PLAs.
Abstract:
A system and method for substituting dynamic pipelines with static queues in a pipelined processor. The system and method are to provide a reduction in power consumption and clock distribution, as well as other advantages.
Abstract:
A method and apparatus are provided for detecting faults in a queue (also known as FIFO) in a digital system. The method augments the FIFO with an external monitoring mechanism which, on demand, checks the FIFO's operation and alerts the system to malfunctioning of the FIFO's control mechanism or corruption of data contained therein. The detection apparatus does not depend on the implementation of the FIFO; the checking is based solely on observing the data entering and exiting the FIFO. Furthermore, the apparatus works in a non-intrusive manner during a normal operation of the FIFO as part of the system. The method and apparatus allow for many variants, all derived from the same general scheme, and which allow different levels of protection against faults.
Abstract:
A method and apparatus for implementing mathematical functions of the nature of f(x). The range of values for the value of x (e.g., from 1 to 2 when x is represented in a floating point form) is divided into two intervals. Instead of using a single memory, such as a ROM, to store values for f(x) for the range of values for x, the f(x) values are stored in two such memory devices, one for each of the two subdivided intervals of x. Because the spacing between values for x in the two intervals are different, the combined size of the two memory devices is smaller than the size of a single ROM to achieve the same precision for the value of x. A selector circuit is used to select which of the ROM outputs represents the appropriate value for f(x) based on the value of x. The value for f(x) is then supplied to an optimizing element that implements the Newton-Raphson algorithm which makes the value for f(x) more precise.