公开(公告)号：US08701054B2

公开(公告)日：2014-04-15

申请号：US13237818

申请日：2011-09-20

申请人： Victor Moroz ,  Munkang Choi ,  Xi-Wei Lin

发明人： Victor Moroz ,  Munkang Choi ,  Xi-Wei Lin

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  H01L21/266 ,  H01L27/0207 ,  H01L29/1033 ,  H01L29/41758

摘要： Roughly described, the invention includes layouts and masks for an integrated circuit, in which the diffusion shape for a transistor includes a transversely extending jog on one or both transversely opposite sides, the jog having inner and outer corners, at least one of which is located relative to the gate conductor longitudinally such that during lithographic printing of the diffusion shape onto the integrated circuit, the corner will round and extend at least partly into the channel region. The invention also includes aspects for a system and method for introducing such jogs, and for an integrated circuit device having a non-rectangular channel region, the channel region being wider where it meets the source region than at some other longitudinal position under the gate.

摘要翻译： 粗略地描述，本发明包括用于集成电路的布局和掩模，其中晶体管的扩散形状包括在一个或两个横向相对侧上的横向延伸的点动，该点动具有内角和外角，其中至少一个位于 相对于栅极导体纵向，使得在将扩散形状平版印刷到集成电路上时，角部将圆形并且至少部分地延伸到沟道区域中。 本发明还包括用于引入这种点动的系统和方法以及用于具有非矩形通道区域的集成电路器件的方面，其中沟道区域在与栅极区域相比较宽的位置处比栅极下方的其它纵向位置更宽。

公开(公告)号：US20100187609A1

公开(公告)日：2010-07-29

申请号：US12390338

申请日：2009-02-20

申请人： Victor Moroz ,  Munkang Choi ,  Xi-Wei Lin

发明人： Victor Moroz ,  Munkang Choi ,  Xi-Wei Lin

IPC分类号： H01L27/088 ,  G06F17/50 ,  G03F1/00

CPC分类号： G06F17/5072 ,  H01L21/266 ,  H01L27/0207 ,  H01L29/1033 ,  H01L29/41758

摘要： Roughly described, the invention includes layouts and masks for an integrated circuit, in which the diffusion shape for a transistor includes a transversely extending jog on one or both transversely opposite sides, the jog having inner and outer corners, at least one of which is located relative to the gate conductor longitudinally such that during lithographic printing of the diffusion shape onto the integrated circuit, the corner will round and extend at least partly into the channel region. The invention also includes aspects for a system and method for introducing such jogs, and for an integrated circuit device having a non-rectangular channel region, the channel region being wider where it meets the source region than at some other longitudinal position under the gate.

摘要翻译： 粗略地描述，本发明包括用于集成电路的布局和掩模，其中晶体管的扩散形状包括在一个或两个横向相对侧上的横向延伸的点动，该点动具有内角和外角，其中至少一个位于 相对于栅极导体纵向，使得在将扩散形状平版印刷到集成电路上时，角部将圆形并且至少部分地延伸到沟道区域中。 本发明还包括用于引入这种点动的系统和方法以及用于具有非矩形通道区域的集成电路器件的方面，其中沟道区域在与栅极区域相比较宽的位置处比栅极下方的其它纵向位置更宽。

公开(公告)号：US20140167174A1

公开(公告)日：2014-06-19

申请号：US13717532

申请日：2012-12-17

申请人： Munkang Choi ,  Victor Moroz ,  Xi-Wei Lin

发明人： Munkang Choi ,  Victor Moroz ,  Xi-Wei Lin

IPC分类号： H01L29/78 ,  H01L21/02

CPC分类号： H01L29/78 ,  B82Y10/00 ,  H01L21/02365 ,  H01L29/0673 ,  H01L29/42376 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/785 ,  H01L29/7853 ,  H01L29/78696

摘要： Roughly described, an integrated circuit transistor structure has a body of semiconductor material, the body having two longitudinally spaced doped source/drain volumes with a channel between, a gate stack disposed outside the body and facing at least one of the surfaces of the body along the channel. The body contains an adjustment volume, longitudinally within the channel volume and spaced behind the first surface by a first distance and spaced longitudinally from both the source/drain volumes. The adjustment volume comprises an adjustment volume material having, at each longitudinal position, an electrical conductivity which differs from that of the adjacent body material at the same longitudinal position, at least while the transistor is in an off-state. In one embodiment the adjustment volume material is a dielectric. In another embodiment the adjustment volume material is an electrical conductor.

摘要翻译： 粗略地描述，集成电路晶体管结构具有半导体材料体，该主体具有两个纵向间隔开的掺杂源极/漏极体积，其间具有通道，位于主体外部并面向主体的至少一个表面的栅极堆叠 这个频道。 主体在通道容积内纵向地包含调节体积，并且在第一表面之后隔开第一距离并且与源/排出体积纵向隔开。 调节体积包括至少在晶体管处于截止状态时在每个纵向位置处具有不同于相同主体材料在同一纵向位置的电导率的调节体积材料。 在一个实施例中，调节体积材料是电介质。 在另一个实施例中，调节体积材料是电导体。

公开(公告)号：US20120011479A1

公开(公告)日：2012-01-12

申请号：US13237818

申请日：2011-09-20

申请人： Victor Moroz ,  Munkang Choi ,  Xi-Wei Lin

发明人： Victor Moroz ,  Munkang Choi ,  Xi-Wei Lin

IPC分类号： G06F17/50

CPC分类号： G06F17/5072 ,  H01L21/266 ,  H01L27/0207 ,  H01L29/1033 ,  H01L29/41758

摘要： Roughly described, the invention includes layouts and masks for an integrated circuit, in which the diffusion shape for a transistor includes a transversely extending jog on one or both transversely opposite sides, the jog having inner and outer corners, at least one of which is located relative to the gate conductor longitudinally such that during lithographic printing of the diffusion shape onto the integrated circuit, the corner will round and extend at least partly into the channel region. The invention also includes aspects for a system and method for introducing such jogs, and for an integrated circuit device having a non-rectangular channel region, the channel region being wider where it meets the source region than at some other longitudinal position under the gate.

摘要翻译： 粗略地描述，本发明包括用于集成电路的布局和掩模，其中晶体管的扩散形状包括在一个或两个横向相对侧上的横向延伸的点动，该点动具有内角和外角，其中至少一个位于 相对于栅极导体纵向，使得在将扩散形状平版印刷到集成电路上时，角部将圆形并且至少部分地延伸到沟道区域中。 本发明还包括用于引入这种点动的系统和方法以及用于具有非矩形通道区域的集成电路器件的方面，其中沟道区域在与栅极区域相比较宽的位置处比栅极下方的其它纵向位置更宽。