公开(公告)号：US20110291724A1

公开(公告)日：2011-12-01

申请号：US12786496

申请日：2010-05-25

申请人： Vinod Jain ,  Deependra K. Jain ,  Krishna Thakur ,  Avinash Chandra Tripathi ,  Sanjay Kumar Wadhwa

发明人： Vinod Jain ,  Deependra K. Jain ,  Krishna Thakur ,  Avinash Chandra Tripathi ,  Sanjay Kumar Wadhwa

IPC分类号： H03K3/017

CPC分类号： H03K5/1565

摘要： A duty cycle correction circuit for correcting the duty cycle of a clock signal generated by a clock generator includes a complementary buffer chain, level shifter circuits and a self-bias circuit. A clock signal with a distorted duty cycle and its complement are provided to the level shifter circuits. The level shifter circuits reduce the magnitude of voltage of the clock signal and the complement and generate level shifted signals. The level shifted signals are provided to a differential amplifier that generates a control signal indicating the magnitude of distortion in the duty cycle. The control signal is used to correct the duty cycle of the clock signal. The self-bias circuit is used to bias the differential amplifier.

摘要翻译： 用于校正由时钟发生器产生的时钟信号的占空比的占空比校正电路包括互补缓冲链，电平移位器电路和自偏置电路。 具有失真占空比的时钟信号及其补码提供给电平移位器电路。 电平移位器电路减小时钟信号和补码的电压幅值，并产生电平移位信号。 电平移位信号被提供给差分放大器，该差分放大器产生指示占空比中的失真幅度的控制信号。 控制信号用于校正时钟信号的占空比。 自偏置电路用于偏置差分放大器。

公开(公告)号：US08248130B2

公开(公告)日：2012-08-21

申请号：US12786496

申请日：2010-05-25

申请人： Vinod Jain ,  Deependra K. Jain ,  Krishna Thakur ,  Avinish Chandra Tripathi ,  Sanjay Kumar Wadhwa

发明人： Vinod Jain ,  Deependra K. Jain ,  Krishna Thakur ,  Avinish Chandra Tripathi ,  Sanjay Kumar Wadhwa

IPC分类号： H03K3/17 ,  H03K5/04 ,  H03K7/08

CPC分类号： H03K5/1565

摘要： A duty cycle correction circuit for correcting the duty cycle of a clock signal generated by a clock generator includes a complementary buffer chain, level shifter circuits and a self-bias circuit. A clock signal with a distorted duty cycle and its complement are provided to the level shifter circuits. The level shifter circuits reduce the magnitude of voltage of the clock signal and the complement and generate level shifted signals. The level shifted signals are provided to a differential amplifier that generates a control signal indicating the magnitude of distortion in the duty cycle. The control signal is used to correct the duty cycle of the clock signal. The self-bias circuit is used to bias the differential amplifier.

摘要翻译： 用于校正由时钟发生器产生的时钟信号的占空比的占空比校正电路包括互补缓冲链，电平移位器电路和自偏置电路。 具有失真占空比的时钟信号及其补码提供给电平移位器电路。 电平移位器电路减小时钟信号和补码的电压幅值，并产生电平移位信号。 电平移位信号被提供给差分放大器，该差分放大器产生指示占空比中的失真幅度的控制信号。 控制信号用于校正时钟信号的占空比。 自偏置电路用于偏置差分放大器。

公开(公告)号：US20100271138A1

公开(公告)日：2010-10-28

申请号：US12428490

申请日：2009-04-23

申请人： Krishna Thakur ,  Deependra K. Jain ,  Vinod Jain

发明人： Krishna Thakur ,  Deependra K. Jain ,  Vinod Jain

IPC分类号： H03L7/00

CPC分类号： H03L7/099 ,  H03L7/0898 ,  H03L7/10 ,  H03L2207/06

摘要： A phase-locked loop (PLL) system generates an oscillator signal based on an input reference signal. A calibration circuit generates a calibration current, and a voltage-to-current converter converts a control voltage into a first current. A current-controlled oscillator generates the oscillator signal based on the first current and the calibration current. A charge pump circuit, which is connected to a phase detector, the voltage-to-current converter, and the calibration circuit, generates a charge pump current based on the first current and the calibration current. The charge pump current is used to generate the control voltage based on an error signal.

摘要翻译： 锁相环（PLL）系统基于输入参考信号产生振荡器信号。 校准电路产生校准电流，电压 - 电流转换器将控制电压转换成第一电流。 电流控制振荡器基于第一电流和校准电流产生振荡器信号。 连接到相位检测器，电压 - 电流转换器和校准电路的电荷泵电路基于第一电流和校准电流产生电荷泵电流。 电荷泵电流用于根据误差信号产生控制电压。

公开(公告)号：US07907022B2

公开(公告)日：2011-03-15

申请号：US12428490

申请日：2009-04-23

申请人： Krishna Thakur ,  Deependra K Jain ,  Vinod Jain

发明人： Krishna Thakur ,  Deependra K Jain ,  Vinod Jain

IPC分类号： H03L7/00

CPC分类号： H03L7/099 ,  H03L7/0898 ,  H03L7/10 ,  H03L2207/06

摘要： A phase-locked loop (PLL) system generates an oscillator signal based on an input reference signal. A calibration circuit generates a calibration current, and a voltage-to-current converter converts a control voltage into a first current. A current-controlled oscillator generates the oscillator signal based on the first current and the calibration current. A charge pump circuit, which is connected to a phase detector, the voltage-to-current converter, and the calibration circuit, generates a charge pump current based on the first current and the calibration current. The charge pump current is used to generate the control voltage based on an error signal.

摘要翻译： 锁相环（PLL）系统基于输入参考信号产生振荡器信号。 校准电路产生校准电流，电压 - 电流转换器将控制电压转换成第一电流。 电流控制振荡器基于第一电流和校准电流产生振荡器信号。 连接到相位检测器，电压 - 电流转换器和校准电路的电荷泵电路基于第一电流和校准电流产生电荷泵电流。 电荷泵电流用于根据误差信号产生控制电压。