Pattern detector for serializer-deserializer adaptation
    1.
    发明授权
    Pattern detector for serializer-deserializer adaptation 有权
    串行器 - 解串器适配模式检测器

    公开(公告)号:US08548038B2

    公开(公告)日:2013-10-01

    申请号:US13312443

    申请日:2011-12-06

    IPC分类号: H03H7/40

    摘要: In described embodiments, a Serializer-Deserializer (SerDes) receiver includes a pattern detector that allows for detection of insufficiently randomized pattern periods and low activity periods. A freeze of equalization adaptation during these periods might occur by embedding disqualifying patterns into adaptation data. Some embodiments also allow for detection of long intervals of freeze, and so delay a freeze de-assertion in order for a clock and data recovery (CDR) circuit of the receiver to regain lock to the serial data. Embedding freeze information in the receive data allows for precise synchronization of receive data and freeze.

    摘要翻译: 在所描述的实施例中,串行器解串器(SerDes)接收器包括模式检测器,其允许检测到不充分随机的模式周期和低活动期。 在这些时期内冻结均衡适应可能会通过将不合格的模式嵌入到适应数据中来实现。 一些实施例还允许检测长的冻结间隔,并且因此延迟冻结断言以便接收器的时钟和数据恢复(CDR)电路重新获得对串行数据的锁定。 在接收数据中嵌入冻结信息可以精确地同步接收数据并进行冻结。

    Method and apparatus for equalization using one or more qualifiers
    2.
    发明授权
    Method and apparatus for equalization using one or more qualifiers 有权
    使用一个或多个限定符进行均衡的方法和装置

    公开(公告)号:US08432959B2

    公开(公告)日:2013-04-30

    申请号:US11930814

    申请日:2007-10-31

    IPC分类号: H03H7/30 H03K5/159

    摘要: Methods and apparatus are provided for equalizing a received signal. A received signal is equalized by updating one or more equalization parameters; and discarding the updated equalization parameters if one or more predefined qualifier conditions are detected during the equalizing step. The received signal can optionally be equalized using the updated equalization parameters if the predefined qualifier conditions are not detected during the equalizing step. The updated equalization parameters can optionally be stored if the one or more predefined qualifier conditions are not detected during the equalizing step.

    摘要翻译: 提供了用于均衡接收信号的方法和装置。 通过更新一个或多个均衡参数来使接收信号相等; 以及如果在均衡步骤期间检测到一个或多个预定义的限定条件,则丢弃所述更新的均衡参数。 如果在平衡步骤期间未检测到预定义的限定条件,则可以使用更新的均衡参数来选择性地均衡所接收的信号。 如果在均衡步骤期间未检测到一个或多个预定义限定条件,则可以可选地存储更新的均衡参数。

    METHOD AND APPARATUS FOR EQUALIZATION USING ONE OR MORE QUALIFIERS
    3.
    发明申请
    METHOD AND APPARATUS FOR EQUALIZATION USING ONE OR MORE QUALIFIERS 有权
    使用一个或多个合格者进行均衡化的方法和装置

    公开(公告)号:US20090110046A1

    公开(公告)日:2009-04-30

    申请号:US11930814

    申请日:2007-10-31

    IPC分类号: H03K5/159

    摘要: Methods and apparatus are provided for equalizing a received signal. A received signal is equalized by updating one or more equalization parameters; and discarding the updated equalization parameters if one or more predefined qualifier conditions are detected during the equalizing step. The received signal can optionally be equalized using the updated equalization parameters if the predefined qualifier conditions are not detected during the equalizing step. The updated equalization parameters can optionally be stored if the one or more predefined qualifier conditions are not detected during the equalizing step

    摘要翻译: 提供了用于均衡接收信号的方法和装置。 通过更新一个或多个均衡参数来使接收信号相等; 以及如果在均衡步骤期间检测到一个或多个预定义的限定条件,则丢弃所述更新的均衡参数。 如果在平衡步骤期间未检测到预定义的限定条件,则可以使用更新的均衡参数来选择性地均衡所接收的信号。 如果在均衡步骤期间未检测到一个或多个预定义限定条件,则可以可选地存储更新的均衡参数

    Methods And Apparatus For Determining Receiver Filter Coefficients For A Plurality Of Phases
    4.
    发明申请
    Methods And Apparatus For Determining Receiver Filter Coefficients For A Plurality Of Phases 有权
    用于确定多个相位的接收器滤波器系数的方法和装置

    公开(公告)号:US20090097541A1

    公开(公告)日:2009-04-16

    申请号:US11870908

    申请日:2007-10-11

    IPC分类号: H03H7/30

    CPC分类号: H04L1/205

    摘要: Methods and apparatus are provided for determining receiver filter coefficients for a plurality of phases. One or more coefficients for a receiver filter are determined by determining a first coefficient for a first phase of a data eye; and determining a second coefficient for a second phase of the data eye. The receiver filter may be, for example, a decision-feedback equalizer. The first and second coefficients may be determined by performing an LMS adaptation of decision-feedback equalization coefficients. In another embodiment, the first and second coefficients may be determined by obtaining eye opening metrics from a data eye monitor corresponding to each of the respective first phase and the second phase; and determining the respective first and second coefficients based on the eye opening metrics. The first and second phases can correspond to odd and even phases.

    摘要翻译: 提供了用于确定多个相位的接收机滤波器系数的方法和装置。 通过确定数据眼的第一阶段的第一系数来确定接收机滤波器的一个或多个系数; 以及确定所述数据眼睛的第二阶段的第二系数。 接收机滤波器可以是例如判决反馈均衡器。 可以通过执行判决反馈均衡系数的LMS适应来确定第一和第二系数。 在另一个实施例中,可以通过从对应于相应的第一阶段和第二阶段中的每一个的数据眼睛监视器获得眼睛开度度量来确定第一和第二系数; 以及基于所述眼睛开度度量确定相应的第一和第二系数。 第一和第二相可以对应于奇数和偶数相。

    METHOD AND APPARATUS FOR RATE-DEPENDENT EQUALIZATION
    5.
    发明申请
    METHOD AND APPARATUS FOR RATE-DEPENDENT EQUALIZATION 失效
    用于速率依赖均衡的方法和装置

    公开(公告)号:US20090110045A1

    公开(公告)日:2009-04-30

    申请号:US11930780

    申请日:2007-10-31

    IPC分类号: H03K5/159

    摘要: Methods and apparatus are provided fox equalizing a received signal. A received signal is equalized by determining a data rate of the received signal; obtaining one or more equalization parameters associated with the determined data rate; and equalizing the received signal using the obtained one or more equalization parameters. The equalization parameters may comprise, for example, one or more of a gain parameter, zero control for a high pass filter and one or more threshold settings for one or more latches used during the equalizing step, such as data latches or transition latches (or both).

    摘要翻译: 提供了均衡接收信号的方法和装置。 接收到的信号通过确定接收信号的数据速率来均衡; 获得与所确定的数据速率相关联的一个或多个均衡参数; 以及使用所获得的一个或多个均衡参数来均衡所接收的信号。 均衡参数可以包括例如增益参数,高通滤波器的零控制和在均衡步骤期间使用的一个或多个锁存器的一个或多个阈值设置中的一个或多个,诸如数据锁存器或转换锁存器(或 都)。

    Methods and apparatus for determining receiver filter coefficients for a plurality of phases
    6.
    发明授权
    Methods and apparatus for determining receiver filter coefficients for a plurality of phases 有权
    用于确定多个相位的接收机滤波器系数的方法和装置

    公开(公告)号:US08107522B2

    公开(公告)日:2012-01-31

    申请号:US11870908

    申请日:2007-10-11

    IPC分类号: H03H7/30

    CPC分类号: H04L1/205

    摘要: Methods and apparatus are provided for determining receiver filter coefficients for a plurality of phases. One or more coefficients for a receiver filter are determined by determining a first coefficient for a first phase of a data eye; and determining a second coefficient for a second phase of the data eye. The receiver filter may be, for example, a decision-feedback equalizer. The first and second coefficients may be determined by performing an LMS adaptation of decision-feedback equalization coefficients. In another embodiment, the first and second coefficients may be determined by obtaining eye opening metrics from a data eye monitor corresponding to each of the respective first phase and the second phase; and determining the respective first and second coefficients based on the eye opening metrics. The first and second phases can correspond to odd and even phases.

    摘要翻译: 提供了用于确定多个相位的接收机滤波器系数的方法和装置。 通过确定数据眼的第一阶段的第一系数来确定接收机滤波器的一个或多个系数; 以及确定所述数据眼睛的第二阶段的第二系数。 接收机滤波器可以是例如判决反馈均衡器。 可以通过执行判决反馈均衡系数的LMS适应来确定第一和第二系数。 在另一个实施例中,可以通过从对应于相应的第一阶段和第二阶段中的每一个的数据眼睛监视器获得眼睛开度度量来确定第一和第二系数; 以及基于所述眼睛开度度量确定相应的第一和第二系数。 第一和第二相可以对应于奇数和偶数相。

    Methods and apparatus for improved jitter tolerance in an SFP limit amplified signal
    7.
    发明授权
    Methods and apparatus for improved jitter tolerance in an SFP limit amplified signal 失效
    用于改善SFP限幅放大信号中抖动容限的方法和装置

    公开(公告)号:US08040984B2

    公开(公告)日:2011-10-18

    申请号:US11967602

    申请日:2007-12-31

    IPC分类号: H04L25/08 H04L7/10 H04L7/00

    CPC分类号: H04B10/6972

    摘要: Methods and apparatus are provided for improving the jitter tolerance in an SFP limit amplified signal. Jitter tolerance is improved in a communications receiver by applying a received signal to an SFP limiting amplifier; and applying an output of the SFP limiting amplifier to a low pass filter to improve the jitter tolerance. The low pass filter optionally applies a programmable amount of attenuation to high frequency components of the output. The low pass filter slew rate controls (i.e., rotates) a data eye representation of the received signal to increase the data eye representation along a time axis. The noise margin of the received signal can optionally be improved by applying an output of the low pass filter to an all pass filter. A slew rate controller can evaluate the data eye statistics to determine a setting for the low pass filter.

    摘要翻译: 提供了用于改善SFP限幅放大信号中的抖动容限的方法和装置。 在通信接收机中通过将接收到的信号施加到SFP限幅放大器来提高抖动容差; 并将SFP限幅放大器的输出施加到低通滤波器以提高抖动容限。 低通滤波器可选择地将可编程量的衰减应用于输出的高频分量。 低通滤波器转换速率控制(即旋转)接收信号的数据眼表示,以沿着时间轴增加数据眼睛表示。 可以通过将低通滤波器的输出施加到全通滤波器来可选地改善接收信号的噪声容限。 压摆率控制器可以评估数据眼统计量,以确定低通滤波器的设置。

    Methods and Apparatus for Improved Jitter Tolerance in an SFP Limit Amplified Signal
    8.
    发明申请
    Methods and Apparatus for Improved Jitter Tolerance in an SFP Limit Amplified Signal 失效
    用于改善SFP限幅放大信号中抖动容限的方法和装置

    公开(公告)号:US20090168940A1

    公开(公告)日:2009-07-02

    申请号:US11967602

    申请日:2007-12-31

    IPC分类号: H04L7/00

    CPC分类号: H04B10/6972

    摘要: Methods and apparatus are provided for improving the jitter tolerance in an SFP limit amplified signal. Jitter tolerance is improved in a communications receiver by applying a received signal to an SFP limiting amplifier; and applying an output of the SFP limiting amplifier to a low pass filter to improve the jitter tolerance. The low pass filter optionally applies a programmable amount of attenuation to high frequency components of the output. The low pass filter slew rate controls (i.e., rotates) a data eye representation of the received signal to increase the data eye representation along a time axis. The noise margin of the received signal can optionally be improved by applying an output of the low pass filter to an all pass filter. A slew rate controller can evaluate the data eye statistics to determine a setting for the low pass filter.

    摘要翻译: 提供了用于改善SFP限幅放大信号中的抖动容限的方法和装置。 在通信接收机中通过将接收到的信号施加到SFP限幅放大器来提高抖动容差; 并将SFP限幅放大器的输出施加到低通滤波器以提高抖动容限。 低通滤波器可选择地将可编程量的衰减应用于输出的高频分量。 低通滤波器转换速率控制(即旋转)接收信号的数据眼表示,以沿着时间轴增加数据眼睛表示。 可以通过将低通滤波器的输出施加到全通滤波器来可选地改善接收信号的噪声容限。 压摆率控制器可以评估数据眼统计量,以确定低通滤波器的设置。

    Compensation techniques for reducing power consumption in digital circuitry
    9.
    发明授权
    Compensation techniques for reducing power consumption in digital circuitry 有权
    用于降低数字电路功耗的补偿技术

    公开(公告)号:US07965133B2

    公开(公告)日:2011-06-21

    申请号:US12160373

    申请日:2007-10-31

    IPC分类号: G05F1/10

    CPC分类号: H03K19/00369

    摘要: A compensation circuit for reducing power consumption in at least one digital circuit includes a first sample circuit connected to a first supply voltage, a second sample circuit connected to a second supply voltage, and a controller connected to the first and second sample circuits. The first and second sample circuits are substantially functionally equivalent to one another but optimized for different regions of operation within a specified range of PVT conditions. The controller is operative to receive respective output signals from the first and second sample circuits, to monitor a functionality of the second sample circuit relative to the first sample circuit, and to adjust a level of the second supply voltage to ensure correct operation of the second sample circuit throughout the specified range of PVT conditions. The digital circuit is operative from the second supply voltage.

    摘要翻译: 用于降低至少一个数字电路中的功耗的补偿电路包括连接到第一电源电压的第一采样电路,连接到第二电源电压的第二采样电路和连接到第一和第二采样电路的控制器。 第一和第二采样电路基本上在功能上彼此相等,但是在PVT条件的指定范围内针对不同操作区域进行了优化。 控制器可操作以从第一和第二采样电路接收相应的输出信号,以监测第二采样电路相对于第一采样电路的功能,并调整第二电源电压的电平,以确保第二采样电路的正常工作 采样电路在指定的PVT条件范围内。 数字电路从第二电源电压工作。

    Method and apparatus for determining latch position for decision-feedback equalization using single-sided eye
    10.
    发明授权
    Method and apparatus for determining latch position for decision-feedback equalization using single-sided eye 失效
    用于使用单面眼确定用于判决反馈均衡的闩锁位置的方法和装置

    公开(公告)号:US07711043B2

    公开(公告)日:2010-05-04

    申请号:US11540946

    申请日:2006-09-29

    IPC分类号: H03H7/30 H03H7/40 H03K5/159

    摘要: Methods and apparatus are provided for determining the threshold position of one or more latches employed for decision-feedback equalization. A threshold position of a latch employed by a decision-feedback equalizer is determined by constraining input data such that the input data only contains transitions from a first binary value; obtaining a plurality of samples of a single-sided data eye associated with the constrained input data; and determining a threshold position of the latch based on the samples. The constrained input data can comprise (i) transitions from a binary value of 1 to a binary value of 0 or 1; or (ii) transitions from a binary value of 0 to a binary value of 0 or 1. The size of the single-sided data eye can be obtained by analyzing a histogram associated with the single-sided data eye to identify a region having a constant hit count.

    摘要翻译: 提供了用于确定用于判决反馈均衡的一个或多个锁存器的阈值位置的方法和装置。 通过约束输入数据来确定由判决反馈均衡器采用的锁存器的阈值位置,使得输入数据仅包含来自第一二进制值的转换; 获得与所述约束输入数据相关联的单面数据眼睛的多个样本; 以及基于所述样本确定所述锁存器的阈值位置。 受约束的输入数据可以包括(i)从二进制值1到二进制值0或1的转换; 或(ii)从二进制值0到二进制值0或1的转换。单面数据眼的大小可以通过分析与单面数据眼相关联的直方图来识别具有 不断的命中数。