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公开(公告)号：US3493929A
公开(公告)日：1970-02-03
申请号：US3493929D
申请日：1966-09-09
Applicant: WEBB JAMES E , NASA
Inventor： PERLMAN MARVIN
CPC classification number: G06F7/02
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公开(公告)号：US3535642A
公开(公告)日：1970-10-20
申请号：US3535642D
申请日：1968-03-11
Applicant: WEBB JAMES E , NASA
Inventor： PERLMAN MARVIN
CPC classification number: G06F7/584 , G06F2207/581 , G06F2207/583
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Patent Agency Ranking
公开(公告)号：US3866022A
公开(公告)日：1975-02-11
申请号：US31915072
申请日：1972-12-26
Applicant: NASA , PERLMAN MARVIN , ROUSEY WILLIAM J , MESSNER ALAN
Inventor： FLETCHER JAMES C ADMINISTRATOR , PERLMAN MARVIN , ROUSEY WILLIAM J , MESSNER ALAN
CPC classification number: G06F1/04 , H03K5/15093
Abstract: A system capable of generating every possible data frame subperiod and delayed subperiod of a data frame of length of M clock pulse intervals (CPIs) comprises parallel modulo-mi counters. Each mi is a prime power divisor of M. Each mi pi Alpha i is a cascade of Alpha i identical modulo-pi counters, where mi p pi . The modulo-pi counters are feedback shift registers which cycle through pi distinct states. By this organization, every possible nontrivial data frame subperiod (in terms of clock pulse intervals) and delayed subperiod may be derived. Also, a specific CPI in the data frame may be detected. The number of clock pulses required to bring every (or a subset of all) modulopi counter to a respective designated state or count is determined by The Chinese Remainder Theorem. This corresponds to the solution of simultaneous congruences over relatively prime moduli.
Abstract translation: 能够产生M个时钟脉冲间隔（CPI）长度的数据帧的每个可能的数据帧子周期和延迟的子周期的系统包括并行的模数计数器。 每个mi是M的主要幂除数。每个mi = piαi是αi的级联，相同的模pi计数器，其中mi p =piα。 模pi计数器是通过pi不同状态循环的反馈移位寄存器。 通过该组织，可以导出每个可能的非平凡数据帧子周期（在时钟脉冲间隔方面）和延迟的次周期。 此外，可以检测数据帧中的特定CPI。 需要将每个（或一个子集的）模pi计数器带到相应的指定状态或计数所需的时钟脉冲数由“中国剩余定理”确定。 这对应于相对主要模量的同时同余的解。
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公开(公告)号：US3911330A
公开(公告)日：1975-10-07
申请号：US50101274
申请日：1974-08-27
Applicant: NASA , PERLMAN MARVIN
Inventor： FLETCHER JAMES C ADMINSTRATOR , PERLMAN MARVIN
CPC classification number: G06F7/582 , H03K3/84 , H04L9/0668
Abstract: Four classes of nonlinear nonsingular feedback shift registers (NLFSR) are disclosed. Each NLFSR, assumed to be r stages long, regardless of its class, generates a feedback sequence of length 2r. The sequence is one which cannot be completely deciphered by one not knowing the feedback arrangement, unless at least a very significant portion of the sequence, which is much greater than 2r-1 successive bits is known. Each NLFSR of either class 1 or class 2 has a feedback arrangement which is a function of a primative polynomial of degree r-1. Each register of class 1 includes three nonlinear terms, each one of which is the AND function of a different combination of (r-1) outputs of the first (r-1) stages. Each register of class 2 includes a single nonlinear term which is the AND function of (r-1) outputs of the first (r-1) stages. Each NLFSR in class 3 has a feedback arrangement which is based on a primative polynomial of degree r2 and a unique single nonlinear term, while each NLFSR in class 4 has a feedback arrangement which is based on a primitive polynomial of degree r-3 and three nonlinear terms.
Abstract translation: 公开了四类非线性非奇异反馈移位寄存器（NLFSR）。 每个NLFSR，假定为r阶段长，不管其类，生成长度为2r的反馈序列。 该序列是不能被不知道反馈装置完全解密的序列，除非是比2r-1个连续比特大得多的序列的至少非常重要的部分。 类别1或类别2的每个NLFSR具有反馈布置，其是度r-1的主要多项式的函数。 类别1的每个寄存器包括三个非线性项，其中每一个是第一（r-1）级的（r-1）输出的不同组合的与函数。 类别2的每个寄存器包括单个非线性项，其是第一（r-1）级的（r-1）输出的AND函数。 类3中的每个NLFSR具有基于度r-2的主要多项式和唯一的单个非线性项的反馈布置，而类别4中的每个NLFSR具有基于度r-3的原始多项式的反馈布置 和三个非线性项。
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5.发明授权Pseudonoise sequence generators with three-tap linear feedback shift registers 失效具有三线性线性反馈移位寄存器的PSEUDONOISE序列发生器
公开(公告)号：US3700869A
公开(公告)日：1972-10-24
申请号：US3700869D
申请日：1970-12-04
Applicant: NASA
Inventor： PERLMAN MARVIN
CPC classification number: G06F7/584 , G06F2207/581 , G06F2207/583
Abstract: A PN linear recurring binary sequence generator is described. It comprises a linear feedback shift register of r stages with three-tap feedback logic. The three stages which are fed back are i, j and r, wherein i
Abstract translation: 描述了PN线性循环二进制序列发生器。 它包括具有三抽头反馈逻辑的r级的线性反馈移位寄存器。 反馈的三个阶段是i，j和r，其中i
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6.发明授权
公开(公告)号：US3609327A
公开(公告)日：1971-09-28
申请号：US3609327D
申请日：1969-10-22
Applicant: NASA
Inventor： PERLMAN MARVIN
CPC classification number: G06F7/584 , G06F2207/581 , G06F2207/583 , H04L9/0662
Abstract: A feedback shift register (FSR) comprising a shift register of n stages, with the outputs of selected stages being mod-2 added in a feedback unit. The complement of the unit is fed back to the register''s input stage. The number of outputs, which are fed back, is always odd, equaling a number which is one less than 2, raised to a number representing the number of 1''s in the binary representation of n. The actual stages which are fed back are defined by the exponents of the terms X in the expansion of the term (X+1)n. Such an FSR produces disjointed multistate cycles, each of a length 2i, where
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公开(公告)号：US3621228A
公开(公告)日：1971-11-16
申请号：US3621228D
申请日：1969-09-24
Applicant: NASA
Inventor： PERLMAN MARVIN
CPC classification number: G06F1/022
Abstract: A digital function generator capable of generating any arbitrary single valued function representable by an independent and a dependent variable is disclosed. A state signal generator produces a plurality of output state signals corresponding to quantized sequential values of the independent variable. Predetermined ones of the quantized sequential signals correspond to predetermined incremental values of the dependent variable. A decoder monitors the output of the state signal generator and provides an output signal corresponding to the time of occurrence of the predetermined quantized sequential signals and the ''''sense'''' of the dependent variable change. A monitor provides an output signal which varies as a function of the decoder output. A digital-to-analog converter converts the monitor output to an analog signal representative of the function.
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