Low-Overhead, Bidirectional Error Checking for a Serial Peripheral Interface

    公开(公告)号:US20240086278A1

    公开(公告)日:2024-03-14

    申请号:US18512754

    申请日:2023-11-17

    Applicant: Waymo LLC

    CPC classification number: G06F11/1004 G06F11/0772 G06F11/3031 G06F13/4291

    Abstract: Example embodiments relate to low-overhead, bidirectional error checking for a serial peripheral interface. An example device includes an integrated circuit. The device also includes a serial peripheral interface (SPI) with a Master In Slave Out (MISO) channel and a Master Out Slave In (MOSI) channel. The MOSI channel is configured to receive a write address, payload data, and a forward error-checking code usable to identify data corruption within the write address or the payload data. The integrated circuit is configured to calculate and provide a reverse error-checking code usable to identify data corruption within the write address or the payload data. Additionally, the integrated circuit is configured to compare the forward error-checking code to the reverse error-checking code. Further, the integrated circuit is configured to write, to the write address if the forward error-checking code matches the reverse error-checking code, the payload data.

    Timebase Synchronization Using Pulsed Signal Injection

    公开(公告)号:US20240012447A1

    公开(公告)日:2024-01-11

    申请号:US18473591

    申请日:2023-09-25

    Applicant: Waymo LLC

    CPC classification number: G06F1/12 G06F1/08

    Abstract: A method and system to provide timebase synchronization for multiple processors in a multi-processor sensor system, where each processor operates according to a respective reference clock, and where the processors' respective reference clocks are off sync from each other. An example method includes simultaneously injecting a synchronization pulse respectively into the multiple processors. Further, the method includes recording for each processor, according to the processor's respective reference clock, a respective synchronization-pulse timestamp of the simultaneously injected synchronization pulse, comparing the respective synchronization-pulse timestamps recorded for the processors, and, based on the comparing, computing for each processor a respective time offset. Additionally, the method includes using the per-processor computed time offsets as a basis to provide a synchronized timebase across the processors.

    Timebase synchronization using pulsed signal injection

    公开(公告)号:US11822377B2

    公开(公告)日:2023-11-21

    申请号:US17647633

    申请日:2022-01-11

    Applicant: Waymo LLC

    CPC classification number: G06F1/12

    Abstract: A method and system to provide timebase synchronization for multiple processors in a multi-processor sensor system, where each processor operates according to a respective reference clock, and where the processors' respective reference clocks are off sync from each other. An example method includes simultaneously injecting a synchronization pulse respectively into the multiple processors. Further, the method includes recording for each processor, according to the processor's respective reference clock, a respective synchronization-pulse timestamp of the simultaneously injected synchronization pulse, comparing the respective synchronization-pulse timestamps recorded for the processors, and, based on the comparing, computing for each processor a respective time offset. Additionally, the method includes using the per-processor computed time offsets as a basis to provide a synchronized timebase across the processors.

    Low-Overhead, Bidirectional Error Checking for a Serial Peripheral Interface

    公开(公告)号:US20230176944A1

    公开(公告)日:2023-06-08

    申请号:US17542906

    申请日:2021-12-06

    Applicant: Waymo LLC

    CPC classification number: G06F11/1004 G06F11/0772 G06F11/3031 G06F13/4291

    Abstract: Example embodiments relate to low-overhead, bidirectional error checking for a serial peripheral interface. An example device includes an integrated circuit. The device also includes a serial peripheral interface (SPI) with a Master In Slave Out (MISO) channel and a Master Out Slave In (MOSI) channel. The MOSI channel is configured to receive a write address, payload data, and a forward error-checking code usable to identify data corruption within the write address or the payload data. The integrated circuit is configured to calculate and provide a reverse error-checking code usable to identify data corruption within the write address or the payload data. Additionally, the integrated circuit is configured to compare the forward error-checking code to the reverse error-checking code. Further, the integrated circuit is configured to write, to the write address if the forward error-checking code matches the reverse error-checking code, the payload data.

    Timebase synchronization using pulsed signal injection

    公开(公告)号:US12169420B2

    公开(公告)日:2024-12-17

    申请号:US18473591

    申请日:2023-09-25

    Applicant: Waymo LLC

    Abstract: A method and system to provide timebase synchronization for multiple processors in a multi-processor sensor system, where each processor operates according to a respective reference clock, and where the processors' respective reference clocks are off sync from each other. An example method includes simultaneously injecting a synchronization pulse respectively into the multiple processors. Further, the method includes recording for each processor, according to the processor's respective reference clock, a respective synchronization-pulse timestamp of the simultaneously injected synchronization pulse, comparing the respective synchronization-pulse timestamps recorded for the processors, and, based on the comparing, computing for each processor a respective time offset. Additionally, the method includes using the per-processor computed time offsets as a basis to provide a synchronized timebase across the processors.

    Timebase Synchronization Using Pulsed Signal Injection

    公开(公告)号:US20230221754A1

    公开(公告)日:2023-07-13

    申请号:US17647633

    申请日:2022-01-11

    Applicant: Waymo LLC

    CPC classification number: G06F1/12

    Abstract: A method and system to provide timebase synchronization for multiple processors in a multi-processor sensor system, where each processor operates according to a respective reference clock, and where the processors' respective reference clocks are off sync from each other. An example method includes simultaneously injecting a synchronization pulse respectively into the multiple processors. Further, the method includes recording for each processor, according to the processor's respective reference clock, a respective synchronization-pulse timestamp of the simultaneously injected synchronization pulse, comparing the respective synchronization-pulse timestamps recorded for the processors, and, based on the comparing, computing for each processor a respective time offset. Additionally, the method includes using the per-processor computed time offsets as a basis to provide a synchronized timebase across the processors.

    Lower Power Linearization of Lidar Signals
    7.
    发明公开

    公开(公告)号:US20230184910A1

    公开(公告)日:2023-06-15

    申请号:US17644366

    申请日:2021-12-15

    Applicant: Waymo LLC

    CPC classification number: G01S7/497 G01S17/931 B60W60/001 B60W2420/52

    Abstract: Example embodiments relate to a lower power linearization of lidar signals. An example embodiment includes a method that includes receiving a sample value output by an analog-to-digital converter (ADC) in a processing unit of a lidar system. The ADC may be configured to digitize an optical signal that is compressed by a gain amplifier. The compression may be based on a transfer function comprising one or more linear portions. The method also includes comparing the sample value to one or more threshold values. The one or more threshold values may correspond respectively to the one or more linear portions. The method further includes selecting, for the sample value and based on the comparing, an inverse gain and an associated intercept. The method additionally includes linearizing the sample value based on the selected inverse gain and the associated intercept.

    Low-overhead, bidirectional error checking for a serial peripheral interface

    公开(公告)号:US12216536B2

    公开(公告)日:2025-02-04

    申请号:US18512754

    申请日:2023-11-17

    Applicant: Waymo LLC

    Abstract: Example embodiments relate to low-overhead, bidirectional error checking for a serial peripheral interface. An example device includes an integrated circuit. The device also includes a serial peripheral interface (SPI) with a Master In Slave Out (MISO) channel and a Master Out Slave In (MOSI) channel. The MOSI channel is configured to receive a write address, payload data, and a forward error-checking code usable to identify data corruption within the write address or the payload data. The integrated circuit is configured to calculate and provide a reverse error-checking code usable to identify data corruption within the write address or the payload data. Additionally, the integrated circuit is configured to compare the forward error-checking code to the reverse error-checking code. Further, the integrated circuit is configured to write, to the write address if the forward error-checking code matches the reverse error-checking code, the payload data.

    Low-overhead, bidirectional error checking for a serial peripheral interface

    公开(公告)号:US11860730B2

    公开(公告)日:2024-01-02

    申请号:US17542906

    申请日:2021-12-06

    Applicant: Waymo LLC

    CPC classification number: G06F11/1004 G06F11/0772 G06F11/3031 G06F13/4291

    Abstract: Example embodiments relate to low-overhead, bidirectional error checking for a serial peripheral interface. An example device includes an integrated circuit. The device also includes a serial peripheral interface (SPI) with a Master In Slave Out (MISO) channel and a Master Out Slave In (MOSI) channel. The MOSI channel is configured to receive a write address, payload data, and a forward error-checking code usable to identify data corruption within the write address or the payload data. The integrated circuit is configured to calculate and provide a reverse error-checking code usable to identify data corruption within the write address or the payload data. Additionally, the integrated circuit is configured to compare the forward error-checking code to the reverse error-checking code. Further, the integrated circuit is configured to write, to the write address if the forward error-checking code matches the reverse error-checking code, the payload data.

    LIDAR DEVICES WITH FREQUENCY AND TIME MULTIPLEXING OF SENSING SIGNALS

    公开(公告)号:US20220187458A1

    公开(公告)日:2022-06-16

    申请号:US17549124

    申请日:2021-12-13

    Applicant: Waymo LLC

    Abstract: The subject matter of this specification can be implemented in, among other things, systems and methods of optical sensing that utilize time and frequency multiplexing of sensing signals. Described are, among other things, a light source subsystem to produce a first beam having a first frequency and a second beam having a second frequency, a modulator to impart a modulation to the second beam, and an optical interface subsystem to receive a third beam caused by interaction of the first beam with an object and a fourth beam caused by interaction of the second beam with the object. Also described are one or more circuits to determine, based on a first phase information carried by the third beam, a velocity of the object, and then determine, based on a second phase information carried by the third beam and the first phase information, a distance to the object.

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