Method and Apparatus for Establishing Chat Group
    1.
    发明申请
    Method and Apparatus for Establishing Chat Group 有权
    建立聊天组的方法和装置

    公开(公告)号:US20140324993A1

    公开(公告)日:2014-10-30

    申请号:US13994081

    申请日:2013-04-28

    IPC分类号: H04L12/58

    摘要: The present invention provides a method and apparatus for establishing a chat group. The method performed by a server includes: obtaining an identifier of a user of a first client terminal, an identifier of a chat group to be established and a geographic position of the first terminal; beginning to establish a chat group; selecting at least one second client terminal from a predetermined geographic scope; and inviting a user of the at least one second client terminal to the chat group; receiving authentication information input by the user of the second client terminal from the second client terminal; determining whether the authentication information is correct; if the authentication information is correct, adding the user of the second client terminal into the chat group; and sending information of the second user to the first client terminal; finishing establishing the chat group when a preset finish condition is met.

    摘要翻译: 本发明提供一种用于建立聊天组的方法和装置。 由服务器执行的方法包括:获取第一客户终端的用户的标识符,要建立的聊天组的标识符和第一终端的地理位置; 开始建立一个聊天组; 从预定的地理范围中选择至少一个第二客户终端; 以及向所述聊天组邀请所述至少一个第二客户终端的用户; 从所述第二客户终端接收由所述第二客户终端的用户输入的认证信息; 确定认证信息是否正确; 如果认证信息正确,则将第二客户终端的用户添加到聊天组中; 以及将所述第二用户的信息发送到所述第一客户终端; 当满足预设完成条件时,完成聊天组的建立。

    Thyristor comprising a special doped region characterized by an LDD region and a halo implant
    2.
    发明授权
    Thyristor comprising a special doped region characterized by an LDD region and a halo implant 有权
    晶闸管包括以LDD区域和晕轮植入物为特征的特殊掺杂区域

    公开(公告)号:US08703547B2

    公开(公告)日:2014-04-22

    申请号:US12812852

    申请日:2008-12-22

    申请人: Yi Shan Jun He

    发明人: Yi Shan Jun He

    IPC分类号: H01L21/332

    CPC分类号: H01L27/0262 H01L29/7436

    摘要: The present invention provides a device for electrostatic discharge and the method of manufacturing thereof. P-well is formed on the substrate, and a first N+ doped region, a second N+ doped region and a P+ doped region are formed in the P-well; both ends of each doped region adopt shallow trench isolation for isolation. A lightly doped source-drain region portion is formed between the first N+ doped region and the shallow trench isolation connected thereto. Under the source-drain region, a halo injection with an inverse type is formed. The reverse conduction voltage of the collector of the bipolar transistor is lowered through the introduction of special doped region and the adoption of lightly doped source-drain technology for manufacturing the source-drain region as well as the manufacturing of halo injection with inverse type under the source-drain region, thus reducing the trigger voltage of the device.

    摘要翻译: 本发明提供一种静电放电装置及其制造方法。 P阱形成在衬底上,在P阱中形成第一N +掺杂区,第二N +掺杂区和P +掺杂区; 每个掺杂区域的两端采用浅沟槽隔离来进行隔离。 在第一N +掺杂区域和与其连接的浅沟槽隔离件之间形成轻掺杂源 - 漏区部分。 在源极 - 漏极区域下方形成具有反向类型的晕圈注入。 双极晶体管的集电极的反向传导电压通过引入特殊掺杂区域而降低,并采用轻掺杂源极 - 漏极技术来制造源极 - 漏极区域以及制造具有反相型的光晕注入 源极 - 漏极区域,从而降低器件的触发电压。

    METHOD AND APPARATUS FOR ESD CIRCUITS
    3.
    发明申请
    METHOD AND APPARATUS FOR ESD CIRCUITS 有权
    ESD电路的方法和装置

    公开(公告)号:US20130286520A1

    公开(公告)日:2013-10-31

    申请号:US13455819

    申请日:2012-04-25

    IPC分类号: H02H9/02 H05K3/30

    摘要: A high performance ESD protection circuit is provided. Embodiments include a circuit having an RC clamp circuit including a first NMOS transistor having a first source, drain, and gate, a current mirror circuit including first and second PMOS transistors having a second and third source, drain, and gate, respectively, and an SCR circuit including a first P+ contact. The first source is coupled to a ground rail, the first drain is coupled to the second drain, second gate, and third gate, the second and third sources are coupled to a power rail, and the third drain is coupled to the first P+ contact, wherein during an ESD event the first NMOS and PMOS transistors turn on to discharge a first current to the ground rail, and the current mirror provides a second current to the first P+ contact for turning on the SCR.

    摘要翻译: 提供高性能ESD保护电路。 实施例包括具有RC钳位电路的电路,该RC钳位电路包括具有第一源极,漏极和栅极的第一NMOS晶体管,分别包括具有第二和第三源极,漏极和栅极的第一和第二PMOS晶体管的电流镜电路,以及 SCR电路包括第一P +接触。 第一源耦合到接地轨,第一漏极耦合到第二漏极,第二栅极和第三栅极,第二和第三源耦合到电源轨,并且第三漏极耦合到第一P +触点 ,其中在ESD事件期间,第一NMOS和PMOS晶体管导通以将第一电流放电到接地导轨,并且电流镜向第一P +触点提供第二电流以接通SCR。

    ESD protection for high voltage applications
    4.
    发明授权
    ESD protection for high voltage applications 有权
    ESD保护用于高压应用

    公开(公告)号:US09343413B2

    公开(公告)日:2016-05-17

    申请号:US13474738

    申请日:2012-05-18

    IPC分类号: H02H9/04 H01L23/60 H01L27/02

    摘要: An ESD module includes an ESD circuit coupled between a first source and a second source. A trigger circuit is also included in the ESD module for activating the ESD circuit to provide a low resistance current path between the first and second sources. The trigger circuit includes a reverse diode between the first source and the ESD circuit or between the second source and main ESD circuit. The trigger circuit provides a low trigger voltage to activate the ESD circuit.

    摘要翻译: ESD模块包括耦合在第一源和第二源之间的ESD电路。 ESD模块中还包括触发电路,用于激活ESD电路,以在第一和第二源之间提供低电阻电流路径。 触发电路包括在第一源极和ESD电路之间或第二源极和主ESD电路之间的反向二极管。 触发电路提供低触发电压以激活ESD电路。

    Method and apparatus for ESD circuits
    5.
    发明授权
    Method and apparatus for ESD circuits 有权
    ESD电路的方法和装置

    公开(公告)号:US08885305B2

    公开(公告)日:2014-11-11

    申请号:US13455819

    申请日:2012-04-25

    IPC分类号: H02H9/02 H05K3/30

    摘要: A high performance ESD protection circuit is provided. Embodiments include a circuit having an RC clamp circuit including a first NMOS transistor having a first source, drain, and gate, a current mirror circuit including first and second PMOS transistors having a second and third source, drain, and gate, respectively, and an SCR circuit including a first P+ contact. The first source is coupled to a ground rail, the first drain is coupled to the second drain, second gate, and third gate, the second and third sources are coupled to a power rail, and the third drain is coupled to the first P+ contact, wherein during an ESD event the first NMOS and PMOS transistors turn on to discharge a first current to the ground rail, and the current mirror provides a second current to the first P+ contact for turning on the SCR.

    摘要翻译: 提供高性能ESD保护电路。 实施例包括具有RC钳位电路的电路,该RC钳位电路包括具有第一源极,漏极和栅极的第一NMOS晶体管,分别包括具有第二和第三源极,漏极和栅极的第一和第二PMOS晶体管的电流镜电路, SCR电路包括第一P +接触。 第一源耦合到接地轨,第一漏极耦合到第二漏极,第二栅极和第三栅极,第二和第三源耦合到电源轨,并且第三漏极耦合到第一P +触点 ,其中在ESD事件期间,第一NMOS和PMOS晶体管导通以将第一电流放电到接地导轨,并且电流镜向第一P +触点提供第二电流以接通SCR。

    DEVICE FOR ELECTROSTATIC DISCHARGE AND METHOD OF MANUFACTURING THEREOF
    6.
    发明申请
    DEVICE FOR ELECTROSTATIC DISCHARGE AND METHOD OF MANUFACTURING THEREOF 有权
    静电放电装置及其制造方法

    公开(公告)号:US20110121361A1

    公开(公告)日:2011-05-26

    申请号:US12812852

    申请日:2008-12-22

    申请人: Yi Shan Jun He

    发明人: Yi Shan Jun He

    IPC分类号: H01L29/74 H01L21/332

    CPC分类号: H01L27/0262 H01L29/7436

    摘要: The present invention provides a device for electrostatic discharge and the method of manufacturing thereof. P-well is formed on the substrate, and a first N+ doped region, a second N+ doped region and a P+ doped region are formed in the P-well; both ends of each doped region adopt shallow trench isolation for isolation. A lightly doped source-drain region portion is formed between the first N+ doped region and the shallow trench isolation connected thereto. Under the source-drain region, a halo injection with an inverse type is formed. The reverse conduction voltage of the collector of the bipolar transistor is lowered through the introduction of special doped region and the adoption of lightly doped source-drain technology for manufacturing the source-drain region as well as the manufacturing of halo injection with inverse type under the source-drain region, thus reducing the trigger voltage of the device.

    摘要翻译: 本发明提供一种静电放电装置及其制造方法。 P阱形成在衬底上,在P阱中形成第一N +掺杂区,第二N +掺杂区和P +掺杂区; 每个掺杂区域的两端采用浅沟槽隔离来进行隔离。 在第一N +掺杂区域和与其连接的浅沟槽隔离件之间形成轻掺杂源 - 漏区部分。 在源极 - 漏极区域下方形成具有反向类型的晕圈注入。 双极晶体管的集电极的反向传导电压通过引入特殊掺杂区域而降低,并采用轻掺杂源极 - 漏极技术来制造源极 - 漏极区域以及制造具有反相型的光晕注入 源极 - 漏极区域,从而降低器件的触发电压。