摘要:
A method of operating a regulator controller IC for performing intermittent diode braking for controlling a multiple phase voltage regulator. The method includes receiving at least one signal for detecting repetitive load transients, determining a rate of the repetitive load transients, generating diode braking control signals, each for applying diode braking to a corresponding one of multiple phases for at least one load transient when the repetitive load transients are below a first rate, and controlling the diode braking control signals to drop application of diode braking of at least one phase for at least one load transient when the repetitive load transients are at least the first rate. The method may include rotating the application of diode braking among the phases during successive applications of diode braking. The method may include dropping an increased number of phases for diode braking as the rate of repetitive load transients is increased.
摘要:
A method of operating a regulator controller IC for performing intermittent diode braking for controlling a multiple phase voltage regulator. The method includes receiving at least one signal for detecting repetitive load transients, determining a rate of the repetitive load transients, generating diode braking control signals, each for applying diode braking to a corresponding one of multiple phases for at least one load transient when the repetitive load transients are below a first rate, and controlling the diode braking control signals to drop application of diode braking of at least one phase for at least one load transient when the repetitive load transients are at least the first rate. The method may include rotating the application of diode braking among the phases during successive applications of diode braking. The method may include dropping an increased number of phases for diode braking as the rate of repetitive load transients is increased.
摘要:
Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要:
A phase doubler driver circuit includes a first input for receiving a input PWM drive signal. First control logic generates a first output PWM drive signal and a second output PWM drive signal responsive to the input PWM drive signal. In a first mode of operation, alternating pulses of the input PWM drive are output as the first output PWM drive signal and the second PWM output drive signal respectively. In a second mode of operation, the input PWM drive signal is provided as the first output PWM drive signal when a second phase current associated with the second output PWM drive signal exceeds a first phase current associated with the first output PWM drive signal and the input PWM drive signal is provided as the second output PWM drive signal when the phase current associated with the first output PWM signal exceed the phase current associated with the second output PWM signal. Second control logic adds an offset to a falling edge of the first output PWM drive signal responsive to a difference between a first current associated with the first phase current and an average current and for adding the offset to a falling edge of the second output PWM signal responsive to a difference between a second current associated with the second phase current and the average current, wherein the average current comprises the average of the first current and the second current. Drive circuitry generates drive signals responsive to each of the first output PWM drive signal and the second output PWM drive signal.
摘要:
A multiphase regulator which includes an output node developing an output voltage, a feedback circuit determining error of the output voltage and providing a compensation signal indicative thereof, at least three phase circuits coupled in parallel to the output node, and an adaptive controller. Each phase circuit includes a modulation circuit and a switch circuit. Each modulation circuit receives the compensation signal and generates pulses on a corresponding one of the pulse modulation signals. Each switch circuit is coupled to the output node and is controlled by a corresponding pulse modulation signal. The adaptive controller is responsive to a load indication signal, such as indicating a low load condition, and drops operation of at least one of the phase circuits and adds at least one pulse to a pulse modulation signal of each remaining phase circuit.
摘要:
A pulse control system for a multiphase regulator including an error amplifier, a multiphase generator, and an adaptive controller. The error amplifier provides an error signal indicative of output voltage error. The multiphase generator develops modulation pulses for phases based on the error signal. The adaptive controller is responsive to a load indication signal and redirects at least one modulation pulse from a first of phase to a second phase. The load indication signal may be received from a microprocessor indicating a low power mode. The adaptive controller provides a smooth and efficient transition to low load conditions by dropping operation of one or more phases and redirecting modulation pulses to the remaining one or more phases, and reduced phases improve power efficiency for the low load conditions.
摘要:
A pulse control system for a multiphase regulator including an error amplifier, a multiphase generator, and an adaptive controller. The error amplifier provides an error signal indicative of output voltage error. The multiphase generator develops modulation pulses for phases based on the error signal. The adaptive controller is responsive to a load indication signal and redirects at least one modulation pulse from a first of phase to a second phase. The load indication signal may be received from a microprocessor indicating a low power mode. The adaptive controller provides a smooth and efficient transition to low load conditions by dropping operation of one or more phases and redirecting modulation pulses to the remaining one or more phases, and reduced phases improve power efficiency for the low load conditions.
摘要:
A multiphase regulator which includes an output node developing an output voltage, a feedback circuit determining error of the output voltage and providing a compensation signal indicative thereof, at least three phase circuits coupled in parallel to the output node, and an adaptive controller. Each phase circuit includes a modulation circuit and a switch circuit. Each modulation circuit receives the compensation signal and generates pulses on a corresponding one of the pulse modulation signals. Each switch circuit is coupled to the output node and is controlled by a corresponding pulse modulation signal. The adaptive controller is responsive to a load indication signal, such as indicating a low load condition, and drops operation of at least one of the phase circuits and adds at least one pulse to a pulse modulation signal of each remaining phase circuit.
摘要:
Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.
摘要:
Pulse width modulation (PWM) controllers and output stage driver circuits and related methods of communicating switching regulator mode information. The controller includes circuitry that recognizes intervals when the load driven by the regulator is in a low power mode. Responsive to recognizing the low power mode, the controller generates a PWM mode signal having at least three (3) different levels including at least one intermediate level that is coupled to at least one driver. Based on the PWM mode signal, the regulator is switched into a power saving low power operational mode.