公开(公告)号：US5428800A

公开(公告)日：1995-06-27

申请号：US960965

申请日：1992-10-13

申请人： Wen-Jai Hsieh ,  Yih-Chyun Jenq ,  Chi-Song Horng ,  Keith Lofstrom

发明人： Wen-Jai Hsieh ,  Yih-Chyun Jenq ,  Chi-Song Horng ,  Keith Lofstrom

IPC分类号： H03K19/173 ,  G06F13/40 ,  H03K19/0175 ,  H03K19/177 ,  G06F13/00 ,  H03K17/16

CPC分类号： G06F13/4004 ,  H03K19/017581 ,  H03K19/01759

摘要： A bi-directional buffer includes first and second unidirectional buffers connected for retransmitting signals in opposite directions between first and second buses. When an external bus driver pulls the first bus low, the first unidirectional buffer pulls the second bus low and generates a signal inhibiting the second unidirectional buffer from actively driving the first bus. When the external bus driver allows the first bus to return to the high logic level, the first unidirectional buffer temporarily supplies a high charging current to the second bus to quickly pull it up. Similarly, when an external bus driver pulls the second bus low, the second unidirectional buffer pulls the first bus low and generates a signal inhibiting the first unidirectional buffer from actively driving the second bus. When the external bus driver allows the second bus to return to the high logic level, the second buffer temporarily supplies a high charging current to the first bus to quickly pull it up. The bi-directional buffer includes a register for storing and reading out data representing successive logic states of a signal on the first bus, thereby providing a history of data appearing on the bus.

摘要翻译： 双向缓冲器包括第一和第二单向缓冲器，连接用于在第一和第二总线之间以相反方向重新发送信号。 当外部总线驱动器将第一总线拉低时，第一单向缓冲器将第二总线拉低，并产生禁止第二单向缓冲器主动驱动第一总线的信号。 当外部总线驱动器允许第一总线返回到高逻辑电平时，第一单向缓冲器临时向第二总线提供高充电电流，以快速将其拉起。 类似地，当外部总线驱动器将第二总线拉低时，第二单向缓冲器将第一总线拉低，并产生禁止第一单向缓冲器主动驱动第二总线的信号。 当外部总线驱动器允许第二总线返回到高逻辑电平时，第二缓冲器暂时向第一总线提供高充电电流以快速将其拉起。 双向缓冲器包括用于存储和读出表示第一总线上的信号的连续逻辑状态的数据的寄存器，从而提供出现在总线上的数据历史。

公开(公告)号：US5282271A

公开(公告)日：1994-01-25

申请号：US912975

申请日：1992-07-06

申请人： Wen-Jai Hsieh ,  Yih-Chyun Jeng ,  Chi-Song Horng ,  Keith Lofstrom

发明人： Wen-Jai Hsieh ,  Yih-Chyun Jeng ,  Chi-Song Horng ,  Keith Lofstrom

IPC分类号： G06F13/40 ,  H03K19/0175 ,  G06F13/00

CPC分类号： G06F13/4004 ,  H03K19/017581 ,  H03K19/01759

摘要： A field programmable interconnect device (FPID) flexibly interconnects a set of electronic components such as integrated circuits and other devices to one another. The FPID is an integrated circuit chip including a set of ports and a cross-point switch that can be programmed to logically connect any one port to any other port. Each FPID buffer port may be programmed to operate in various modes including unidirectional and bi-directional, with or without tristate control, and to operate at various input or output logic levels with adjustable pull up currents. Each FPID buffer port may also be programmed to perform various operations on buffered signals including adjustably delaying the signal, inverting it or forcing it high or low. The FPID is linked to a host computer via a bus that permits the host computer to program the FPID to make the desired connections, to select various modes of operation of buffers within the FPID and to read out data stored in the FPID. Each port of an FPID also samples and stores data indicating states of the signal passing through it over the last several system clock cycles. The FPID can subsequently read out the stored data to the host computer.

摘要翻译： 现场可编程互连设备（FPID）将诸如集成电路和其他设备的一组电子部件彼此灵活地互连。 FPID是一个集成电路芯片，包括一组端口和交叉点开关，可以将其编程为将任何一个端口逻辑连接到任何其他端口。 每个FPID缓冲器端口可以被编程为在具有或不具有三态控制的情况下以各种模式进行操作，包括单向和双向，并且可以在具有可调节上拉电流的各种输入或输出逻辑电平下工作。 每个FPID缓冲器端口也可以被编程为对缓冲信号执行各种操作，包括可调节地延迟信号，反相或强制其高或低。 FPID通过总线链接到主计算机，总线允许主计算机对FPID进行编程以进行所需的连接，以选择FPID内的缓冲器的各种操作模式并读出存储在FPID中的数据。 FPID的每个端口还采样和存储指示在最后几个系统时钟周期内通过它的信号的状态的数据。 FPID随后可以将存储的数据读出到主计算机。

公开(公告)号：US5202593A

公开(公告)日：1993-04-13

申请号：US785299

申请日：1991-10-30

申请人： Thomas B. Huang ,  Yih-Chyun Jenq ,  Keith Lofstrom

发明人： Thomas B. Huang ,  Yih-Chyun Jenq ,  Keith Lofstrom

IPC分类号： H03K19/0175 ,  H03K5/02 ,  H04L5/16

CPC分类号： H03K5/026

摘要： A bi-directional bus repeater includes two unidirectional bus repeaters connected for retransmitting signals in opposite directions between two buses. When an external bus driver pulls either bus low, one of the unidirectional bus repeaters pulls the other bus low. When the external bus driver allows the bus to rise to the high logic level, the unidirectional bus repeater temporarily supplies a high charging current to the other bus to quickly pull it up. Each unidirectional bus repeater also generates signals indicating when it is actively pulling its output bus up or down and the indicating signals inhibit one unidirectional bus repeater from actively driving its output when the other unidirectional bus repeater is actively driving its output.

摘要翻译： 双向总线中继器包括两个单向总线中继器，用于在两条总线之间的相反方向重新发送信号。 当外部总线驱动器将总线拉低时，其中一个单向总线中继器将另一个总线拉低。 当外部总线驱动器允许总线上升到高逻辑电平时，单向总线中继器临时向另一个总线提供高充电电流，以快速将其拉高。 每个单向总线中继器还产生指示何时正在向上或向下拉动其输出总线的信号，并且当另一个单向总线中继器正在主动驱动其输出时，指示信号禁止一个单向总线中继器主动驱动其输出。

公开(公告)号：US06738788B1

公开(公告)日：2004-05-18

申请号：US10124860

申请日：2002-04-17

申请人： Chi-Song Horng ,  Keith Lofstrom

发明人： Chi-Song Horng ,  Keith Lofstrom

IPC分类号： G06F1730

CPC分类号： G06F17/30286 ,  Y10S707/99942 ,  Y10S707/99945

摘要： A database system accesses database records referenced by a binary number key having two fields, a typeID field containing only deterministic bits, and a uniqueID field permissibly containing one or more non-deterministic bits at any bit positions therein. The database system maintains a set of databases, each being identified by a separate value of the typeID field of the binary number key. The records of each database are allocated among a plurality of bins, with each bin being identified (keyed) by separate value of a binID field, and with each record being identified (keyed) by a separate value of a recID field. The database system locates a record of interest referenced by the binary number key by first selecting a particular one of the databases that is identified by the typeID field of the binary number key. It then compares a portion of selected bits of the binary number key's uniqueID field to binID values identifying bins of the selected database to determine a subset of the bins that may include the record of interest. The database system then compares the full uniqueID field of the binary number key to the recIDs values for records of the subset of bins to determine which particular recID field identifies the record of interest.

摘要翻译： 数据库系统访问由具有两个字段的二进制数字键引用的数据库记录，仅包含确定性位的typeID字段以及在其中的任何位位置允许包含一个或多个非确定性位的唯一ID字段。 数据库系统维护一组数据库，每个数据库由二进制数字键的typeID字段的单独值标识。 每个数据库的记录被分配在多个箱之间，其中每个仓被binID字段的分开的值识别（加密），并且每个记录由recID字段的单独的值标识（加密）。 数据库系统通过首先选择由二进制数字键的typeID字段标识的特定数据库来定位由二进制数字键引用的感兴趣的记录。 然后，它将二进制数密钥的唯一ID字段的所选位的一部分与识别所选数据库的存储区的binID值进行比较，以确定可能包括感兴趣的记录的仓的子集。 数据库系统然后将二进制数字键的完整uniqueID字段与bin的子集的记录的recIDs值进行比较，以确定哪个特定的recID字段标识感兴趣的记录。

公开(公告)号：USRE40188E1

公开(公告)日：2008-03-25

申请号：US10318583

申请日：2002-12-12

申请人： Keith Lofstrom

发明人： Keith Lofstrom

IPC分类号： G06F17/50 ,  G06F19/00 ,  G01R31/02

CPC分类号： H01L23/544 ,  H01L2223/54433 ,  H01L2223/5444 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/3011 ,  H04L9/0866 ,  H01L2924/00

摘要： An integrated circuit identification device (ICID) to be incorporated into an integrated circuit (IC) includes an array of electronic cells in which the magnitude of an output signal of each cell is a function of randomly occurring parametric variations which vary from cell-to-cell. The ICID also includes a circuit for measuring the output of each cell and for producing output data having a value reflecting the particular combination of measured characteristics of all of the elements of the array. When we make the number of elements in the array large enough, we insure that to a high degree of probability, the pattern of measured array cell characteristics for an ICID embedded in any one IC will be unique and distinguishable from such patterns measured by ICIDs embedded in millions of other ICs. Thus the value of the output data produced by an ICID circuit acts as a unique “fingerprint” for the IC in which it is installed, and can be used as a unique identification (ID) for that IC.

摘要翻译： 要集成到集成电路（IC）中的集成电路识别装置（ICID）包括电子单元阵列，其中每个单元的输出信号的大小是随机出现的参数变化的函数， 细胞。 ICID还包括用于测量每个单元的输出并产生具有反映阵列的所有元件的测量特性的特定组合的值的输出数据的电路。 当我们使阵列中的元素数量足够大时，我们确保以高度的概率，嵌入在任何一个IC中的ICID的测量阵列单元特征的模式将是唯一的，并且与嵌入的ICID所测量的这种模式区分开 数百万其他IC。 因此，由ICID电路产生的输出数据的值作为其安装的IC的唯一“指纹”，并且可以用作该IC的唯一标识（ID）。

公开(公告)号：US6161213A

公开(公告)日：2000-12-12

申请号：US251692

申请日：1999-02-17

申请人： Keith Lofstrom

发明人： Keith Lofstrom

IPC分类号： H01L23/544 ,  G06F17/50 ,  G01R31/02 ,  G06F19/00

CPC分类号： H01L23/544 ,  H01L2223/54433 ,  H01L2223/5444 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/3011 ,  H04L9/0866 ,  H01L2924/00

摘要： An integrated circuit identification device (ICID) to be incorporated into an integrated circuit (IC) includes an array of electronic cells in which the magnitude of an output signal of each cell is a function of randomly occurring parametric variations which vary from cell-to-cell. The ICID also includes a circuit for measuring the output of each cell and for producing output data having a value reflecting the particular combination of measured characteristics of all of the elements of the array. When we make the number of elements in the array large enough, we insure that to a high degree of probability, the pattern of measured array cell characteristics for an ICID embedded in any one IC will be unique and distinguishable from such patterns measured by ICIDs embedded in millions of other ICs. Thus the value of the output data produced by an ICID circuit acts as a unique "fingerprint" for the IC in which it is installed, and can be used as a unique identification (ID) for that IC.

摘要翻译： 要集成到集成电路（IC）中的集成电路识别装置（ICID）包括电子单元阵列，其中每个单元的输出信号的大小是随机出现的参数变化的函数， 细胞。 ICID还包括用于测量每个单元的输出并产生具有反映阵列的所有元件的测量特性的特定组合的值的输出数据的电路。 当我们使阵列中的元素数量足够大时，我们确保以高度的概率，嵌入在任何一个IC中的ICID的测量阵列单元特征的模式将是唯一的，并且与嵌入的ICID所测量的这种模式区分开 数百万其他IC。 因此，由ICID电路产生的输出数据的值作为其安装的IC的唯一“指纹”，并且可以用作该IC的唯一标识（ID）。