Digital sum variation computation method and system

    公开(公告)号:US07042951B2

    公开(公告)日:2006-05-09

    申请号:US11002514

    申请日:2004-12-01

    IPC分类号: H04L25/00 G11B20/10 H03M5/00

    摘要: A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

    Recordable disk recording controller with batch register controller
    2.
    发明授权
    Recordable disk recording controller with batch register controller 有权
    具有批次寄存器控制器的可记录磁盘记录控制器

    公开(公告)号:US06795893B2

    公开(公告)日:2004-09-21

    申请号:US09748447

    申请日:2000-12-22

    IPC分类号: G06F1200

    摘要: In a recordable disk recording controller circuit, a data buffer manager receives a command and sends the command to a micro-controller. The micro-controller generates a set of register batches from each command and sends the register data and index of the register batch to a batch register controller. The batch register controller receives the register data and index of the register batch from the micro-controller and stores the received register data and index of the register batch in a batch buffer. The batch register controller retrieves the register batches from the batch buffer and writes the master registers of an encoder controller based on the register index and register data of the register batches after the master registers of the encoder controller are updated into the slave registers of the encoder controller. The encoder controller generates control signals to a recording circuit depending on updated slave registers. Such control signals cause the recording circuit to record a signal representative of signal data on a recordable disk located in a recordable disk driver.

    摘要翻译: 在可记录盘记录控制器电路中,数据缓冲器管理器接收命令并将命令发送到微控制器。 微控制器从每个命令生成一组寄存器批,并将寄存器批次的寄存器数据和索引发送到批量寄存器控制器。 批处理寄存器控制器从微控制器接收寄存器数据的寄存器数据和索引,并将接收到的寄存器数据和寄存器批次的索引存储在批量缓冲器中。 批量寄存器控制器从批量缓冲器中检索寄存器批次,并在编码器控制器的主寄存器更新到编码器的从寄存器之后,基于寄存器索引和寄存器批次的寄存器数据写入编码器控制器的主寄存器 控制器。 编码器控制器根据更新的从机寄存器向记录电路生成控制信号。 这种控制信号使得记录电路将表示信号数据的信号记录在位于可记录磁盘驱动器中的可记录盘上。

    Digital sum variation computation method and system

    公开(公告)号:US20050094755A1

    公开(公告)日:2005-05-05

    申请号:US11002514

    申请日:2004-12-01

    IPC分类号: G11B20/14 H04B14/04

    摘要: A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

    Adaptive-selection method for memory access priority control in MPEG
processor
    4.
    发明授权
    Adaptive-selection method for memory access priority control in MPEG processor 失效
    MPEG处理器中存储器访问优先级控制的自适应选择方法

    公开(公告)号:US5982360A

    公开(公告)日:1999-11-09

    申请号:US941064

    申请日:1997-09-30

    摘要: An adaptive-selection method for memory access priority control in MPEG processor. The processor has functional modules that include an input interface, a CPU, an audio decoder, a video decoder, an audio processor, a video processor and a memory controller. Each of the modules gains control over the data bus via arbitration by the memory controller for accessing the memory. The access priority of the CPU to the data bus is maintained at a relatively lower level except when the CPU needs to perform parsing on the MPEG compressed data and implementing the initial decoding of the audio compressed data. The use of data bus bandwidth is therefore balanced among all the system resources thereby increasing the overall system performance.

    摘要翻译: 一种用于MPEG处理器中存储器访问优先级控制的自适应选择方法。 处理器具有包括输入接口,CPU,音频解码器,视频解码器,音频处理器,视频处理器和存储器控制器的功能模块。 每个模块通过存储器控制器的仲裁来获得对数据总线的控制以访问存储器。 除CPU需要对MPEG压缩数据进行解析并实现音频压缩数据的初始解码之外,CPU对数据总线的访问优先级保持在相对较低的水平。 因此,在所有系统资源之间平衡使用数据总线带宽,从而提高整个系统的性能。

    Digital sum variation computation method and system

    公开(公告)号:USRE44013E1

    公开(公告)日:2013-02-19

    申请号:US12118075

    申请日:2008-05-09

    摘要: A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

    Digital sum variation computation method and system
    6.
    发明授权
    Digital sum variation computation method and system 有权
    数字和变异计算方法和系统

    公开(公告)号:US06853684B2

    公开(公告)日:2005-02-08

    申请号:US10370261

    申请日:2003-02-19

    摘要: A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

    摘要翻译: 提出了一种数字和变化(DSV)计算方法和系统,其能够确定信道位符号的比特流的DSV值,从而找到用于在每个后续的信道对符号对之间插入的最佳合并位符号, 位符号。 该DSV计算方法和系统的特征在于使用零数值和变化(ZDSV)原理来确定DSV。 该DSV计算方法和系统可以以更具成本效益的方式找到用于在每个后续对的通道位符号之间插入的最佳合并位符号,并需要减少的存储量,并且使用需要减少的查找表 用于存储的存储空间量使得与现有技术相比可以减少存储空间。 因此,该DSV计算方法和系统比现有技术更有利于使用。

    Method and system for computing digital sum variation of a stream of channel-bit symbols
    7.
    发明授权
    Method and system for computing digital sum variation of a stream of channel-bit symbols 有权
    用于计算通道位符号流的数字和变化的方法和系统

    公开(公告)号:US06542452B1

    公开(公告)日:2003-04-01

    申请号:US09494176

    申请日:2000-01-31

    IPC分类号: G11B700

    摘要: A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

    摘要翻译: 提出了一种数字和变化(DSV)计算方法和系统,其能够确定信道位符号的比特流的DSV值,从而找到用于在每个后续的信道对符号对之间插入的最佳合并位符号, 位符号。 该DSV计算方法和系统的特征在于使用零数值和变化(ZDSV)原理来确定DSV。 该DSV计算方法和系统可以以更具成本效益的方式找到用于在每个后续对的通道位符号之间插入的最佳合并位符号,并需要减少的存储量,并且使用需要减少的查找表 用于存储的存储空间量使得与现有技术相比可以减少存储空间。 因此,该DSV计算方法和系统比现有技术更有利于使用。

    Method and apparatus for positioning edges of photograph
    8.
    发明授权
    Method and apparatus for positioning edges of photograph 失效
    用于定位照片边缘的方法和装置

    公开(公告)号:US08345965B2

    公开(公告)日:2013-01-01

    申请号:US12612478

    申请日:2009-11-04

    申请人: Wen-Yi Wu

    发明人: Wen-Yi Wu

    IPC分类号: G06K9/00

    CPC分类号: H04N5/23229

    摘要: A method for positioning edges of a photograph, includes flowing steps. A photograph taken by a camera module of an electronic device is obtained. RGB values of the pixels of the photograph are processed to get corresponding RGB modification values of the pixels of the photograph. Positions of vertexes of the photograph are computed according to the RGB modification values. The vertexes are connected to form edges of the photograph.

    摘要翻译: 一种用于定位照片边缘的方法,包括流动步骤。 获得由电子设备的相机模块拍摄的照片。 对照片的像素的RGB值进行处理,以获得照片的像素的相应的RGB修改值。 根据RGB修改值计算照片顶点的位置。 顶点被连接以形成照片的边缘。

    Method for testing wireless connection of electronic device
    9.
    发明授权
    Method for testing wireless connection of electronic device 失效
    电子设备无线连接测试方法

    公开(公告)号:US08208400B2

    公开(公告)日:2012-06-26

    申请号:US12551730

    申请日:2009-09-01

    IPC分类号: G01R31/08

    CPC分类号: H04W24/06

    摘要: A method for testing a wireless connection of an electronic device includes the following steps. The electronic device is initialized to a stand-by state. A testing server connects the electronic device to form a wireless connection based on a wireless protocol. The testing server outputs a plurality of first data packages to the electronic device and receives a plurality of second data packages from the electronic device to test a rate of data throughput via the wireless connection by the testing server. A wake-up signal is sent to the electronic device via the wireless connection to the electronic device.

    摘要翻译: 一种用于测试电子设备的无线连接的方法包括以下步骤。 电子设备被初始化为待机状态。 测试服务器连接电子设备以形成基于无线协议的无线连接。 测试服务器将多个第一数据包输出到电子设备,并从电子设备接收多个第二数据包,以通过测试服务器通过无线连接测试数据吞吐量的速率。 通过与电子设备的无线连接将唤醒信号发送到电子设备。

    Method for decoding multiword information
    10.
    发明授权
    Method for decoding multiword information 有权
    多字信息解码方法

    公开(公告)号:US08069398B2

    公开(公告)日:2011-11-29

    申请号:US11837351

    申请日:2007-08-10

    IPC分类号: H03M13/00

    摘要: A method for decoding multiword information comprises steps (a) to (e). In step (a), a multiword information cluster, e.g., ECC, including high protective codewords, e.g., BIS, and low protective codewords, e.g., LDC, is provided. In step (b), the high and low protective codewords are stored into a first memory, e.g., DRAM. In step (c), the high protective codewords are decoded to generate high protective word erasure indicators showing whether decoding errors occur. In step (d), the high protective word erasure indicators are stored into a second memory, e.g., SRAM. In step (e), the low protective codewords are decoded. In the meanwhile, an erasure bit for a low protective codeword is marked by finding high protective codewords close to the low protective codeword in the multiword information cluster and looking up the high protective word erasure indicators of the high protective codewords close to the low protective codeword.

    摘要翻译: 用于解码多字信息的方法包括步骤(a)至(e)。 在步骤(a)中,提供了包括高保护码字(例如BIS)和低保护码字(例如LDC)的多字信息簇,例如ECC。 在步骤(b)中,高和低保护码字被存储到第一存储器,例如DRAM中。 在步骤(c)中,对高保护码字进行解码以产生表示解码错误是否发生的高保护字擦除指示符。 在步骤(d)中,高保护字擦除指示器被存储到第二存储器例如SRAM中。 在步骤(e)中,低保护码字被解码。 同时,通过在多字信息簇中找到靠近低保护码字的高保护码字,并查找靠近低保护码字的高保护码字的高保护字擦除指示符,标记出低保护码字的擦除位 。