公开(公告)号：US06795893B2

公开(公告)日：2004-09-21

申请号：US09748447

申请日：2000-12-22

申请人： Wen-Yi Wu ,  Jyh-Shin Pan ,  Chun-Nan Lin

发明人： Wen-Yi Wu ,  Jyh-Shin Pan ,  Chun-Nan Lin

IPC分类号： G06F1200

CPC分类号： G06F3/0613 ,  G06F3/0656 ,  G06F3/0677 ,  G11B2020/1062

摘要： In a recordable disk recording controller circuit, a data buffer manager receives a command and sends the command to a micro-controller. The micro-controller generates a set of register batches from each command and sends the register data and index of the register batch to a batch register controller. The batch register controller receives the register data and index of the register batch from the micro-controller and stores the received register data and index of the register batch in a batch buffer. The batch register controller retrieves the register batches from the batch buffer and writes the master registers of an encoder controller based on the register index and register data of the register batches after the master registers of the encoder controller are updated into the slave registers of the encoder controller. The encoder controller generates control signals to a recording circuit depending on updated slave registers. Such control signals cause the recording circuit to record a signal representative of signal data on a recordable disk located in a recordable disk driver.

摘要翻译： 在可记录盘记录控制器电路中，数据缓冲器管理器接收命令并将命令发送到微控制器。 微控制器从每个命令生成一组寄存器批，并将寄存器批次的寄存器数据和索引发送到批量寄存器控制器。 批处理寄存器控制器从微控制器接收寄存器数据的寄存器数据和索引，并将接收到的寄存器数据和寄存器批次的索引存储在批量缓冲器中。 批量寄存器控制器从批量缓冲器中检索寄存器批次，并在编码器控制器的主寄存器更新到编码器的从寄存器之后，基于寄存器索引和寄存器批次的寄存器数据写入编码器控制器的主寄存器 控制器。 编码器控制器根据更新的从机寄存器向记录电路生成控制信号。 这种控制信号使得记录电路将表示信号数据的信号记录在位于可记录磁盘驱动器中的可记录盘上。

公开(公告)号：US06853684B2

公开(公告)日：2005-02-08

申请号：US10370261

申请日：2003-02-19

申请人： Wen-Yi Wu ,  Jyh-Shin Pan

发明人： Wen-Yi Wu ,  Jyh-Shin Pan

IPC分类号： G11B20/14 ,  H04L25/00 ,  G11B20/10 ,  H03M5/00

CPC分类号： G11B20/1426 ,  G11B2020/1457 ,  G11B2020/1461 ,  G11B2020/1469

摘要： A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

摘要翻译： 提出了一种数字和变化（DSV）计算方法和系统，其能够确定信道位符号的比特流的DSV值，从而找到用于在每个后续的信道对符号对之间插入的最佳合并位符号， 位符号。 该DSV计算方法和系统的特征在于使用零数值和变化（ZDSV）原理来确定DSV。 该DSV计算方法和系统可以以更具成本效益的方式找到用于在每个后续对的通道位符号之间插入的最佳合并位符号，并需要减少的存储量，并且使用需要减少的查找表 用于存储的存储空间量使得与现有技术相比可以减少存储空间。 因此，该DSV计算方法和系统比现有技术更有利于使用。

公开(公告)号：US06542452B1

公开(公告)日：2003-04-01

申请号：US09494176

申请日：2000-01-31

申请人： Wen-Yi Wu ,  Jyh-Shin Pan

发明人： Wen-Yi Wu ,  Jyh-Shin Pan

IPC分类号： G11B700

CPC分类号： G11B20/1426 ,  G11B2020/1457 ,  G11B2020/1461 ,  G11B2020/1469

摘要： A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

摘要翻译： 提出了一种数字和变化（DSV）计算方法和系统，其能够确定信道位符号的比特流的DSV值，从而找到用于在每个后续的信道对符号对之间插入的最佳合并位符号， 位符号。 该DSV计算方法和系统的特征在于使用零数值和变化（ZDSV）原理来确定DSV。 该DSV计算方法和系统可以以更具成本效益的方式找到用于在每个后续对的通道位符号之间插入的最佳合并位符号，并需要减少的存储量，并且使用需要减少的查找表 用于存储的存储空间量使得与现有技术相比可以减少存储空间。 因此，该DSV计算方法和系统比现有技术更有利于使用。

公开(公告)号：USRE44013E1

公开(公告)日：2013-02-19

申请号：US12118075

申请日：2008-05-09

申请人： Wen-Yi Wu ,  Jyh-Shin Pan

发明人： Wen-Yi Wu ,  Jyh-Shin Pan

IPC分类号： H04B14/04 ,  G11B20/10 ,  H03M5/00 ,  H03M7/00

CPC分类号： G11B20/1426 ,  G11B2020/1457 ,  G11B2020/1461 ,  G11B2020/1469

摘要： A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

公开(公告)号：US07042951B2

公开(公告)日：2006-05-09

申请号：US11002514

申请日：2004-12-01

申请人： Wen-Yi Wu ,  Jyh-Shin Pan

发明人： Wen-Yi Wu ,  Jyh-Shin Pan

IPC分类号： H04L25/00 ,  G11B20/10 ,  H03M5/00

CPC分类号： G11B20/1426 ,  G11B2020/1457 ,  G11B2020/1461 ,  G11B2020/1469

摘要： A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

公开(公告)号：US20050094755A1

公开(公告)日：2005-05-05

申请号：US11002514

申请日：2004-12-01

申请人： Wen-Yi Wu ,  Jyh-Shin Pan

发明人： Wen-Yi Wu ,  Jyh-Shin Pan

IPC分类号： G11B20/14 ,  H04B14/04

CPC分类号： G11B20/1426 ,  G11B2020/1457 ,  G11B2020/1461 ,  G11B2020/1469

摘要： A digital sum variation (DSV) computation method and system is proposed, which is capable of determining the DSV value of a bit stream of channel-bit symbols to thereby find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols. This DSV computation method and system is characterized in the use of a Zero Digital Sum Variation (ZDSV) principle to determine the DSV. This DSV computation method and system can find the optimal merge-bit symbol for insertion between each succeeding pair of the channel-bit symbols in a more cost-effective manner with the need for a reduced amount of memory and utilizes a lookup table requiring a reduced amount of memory space for storage so that memory space can be reduced as compared to the prior art. This DSV computation method and system is therefore more advantageous to use than the prior art.

公开(公告)号：US5982360A

公开(公告)日：1999-11-09

申请号：US941064

申请日：1997-09-30

申请人： Wen-Yi Wu ,  Jyh-Shin Pan

发明人： Wen-Yi Wu ,  Jyh-Shin Pan

IPC分类号： H04N7/26 ,  H04N7/50 ,  H04N21/443 ,  G06T9/00 ,  G06F15/00

CPC分类号： H04N21/443 ,  H04N19/42 ,  H04N19/61

摘要： An adaptive-selection method for memory access priority control in MPEG processor. The processor has functional modules that include an input interface, a CPU, an audio decoder, a video decoder, an audio processor, a video processor and a memory controller. Each of the modules gains control over the data bus via arbitration by the memory controller for accessing the memory. The access priority of the CPU to the data bus is maintained at a relatively lower level except when the CPU needs to perform parsing on the MPEG compressed data and implementing the initial decoding of the audio compressed data. The use of data bus bandwidth is therefore balanced among all the system resources thereby increasing the overall system performance.

摘要翻译： 一种用于MPEG处理器中存储器访问优先级控制的自适应选择方法。 处理器具有包括输入接口，CPU，音频解码器，视频解码器，音频处理器，视频处理器和存储器控制器的功能模块。 每个模块通过存储器控制器的仲裁来获得对数据总线的控制以访问存储器。 除CPU需要对MPEG压缩数据进行解析并实现音频压缩数据的初始解码之外，CPU对数据总线的访问优先级保持在相对较低的水平。 因此，在所有系统资源之间平衡使用数据总线带宽，从而提高整个系统的性能。

公开(公告)号：US07793198B2

公开(公告)日：2010-09-07

申请号：US12433229

申请日：2009-04-30

申请人： Jia-Horng Shieh ,  Jyh-Shin Pan ,  Li-Lien Lin

发明人： Jia-Horng Shieh ,  Jyh-Shin Pan ,  Li-Lien Lin

IPC分类号： H03M13/00

CPC分类号： G11B20/1833 ,  G11B20/1217 ,  G11B2020/1222 ,  G11B2020/1836 ,  G11B2220/2541 ,  G11B2220/255 ,  G11B2220/2562 ,  G11B2220/2579

摘要： An integrated apparatus for multi-standard optical media includes a compact disc/digital versatile disc (CD/DVD) processor, a high-definition DVD (HDDVD) processor and a Blu-ray disc (BD) processor; a memory unit connected to the CD/DVD processor, the HDDVD processor and the BD processor to provide a storage resource; and a shared error correction code (ECC) engine for encoding or decoding the CD/DVD data stream, the HDDVD data stream and the BD data stream. Therein, the ECC engine further has a syndrome/parity generator to encode the data stream or to obtain the syndrome information from the data stream; and an erasure generator to obtain the possible error position information from the data stream. Thereby, the complexity and cost of the integrated apparatus can be reduced.

摘要翻译： 用于多标准光学介质的集成设备包括光盘/数字通用盘（CD / DVD）处理器，高清DVD（HDDVD）处理器和蓝光盘（BD）处理器） 连接到CD / DVD处理器的存储器单元，HDDVD处理器和BD处理器以提供存储资源; 以及用于对CD / DVD数据流进行编码或解码的共享纠错码（ECC）引擎，HDDVD数据流和BD数据流。 其中，ECC引擎还具有对数据流进行编码或从数据流获取校正子信息的校正子/奇偶校验发生器; 以及擦除发生器，以从数据流中获取可能的错误位置信息。 由此，能够降低集成装置的复杂性和成本。

公开(公告)号：US20060282614A1

公开(公告)日：2006-12-14

申请号：US11420800

申请日：2006-05-29

申请人： Jia-Horng SHIEH ,  Li-Lien Lin ,  Jyh-Shin Pan

发明人： Jia-Horng SHIEH ,  Li-Lien Lin ,  Jyh-Shin Pan

IPC分类号： G06F13/00

CPC分类号： G06F3/0656 ,  G06F3/0613 ,  G06F3/0677 ,  G11B20/10527 ,  G11B20/1833 ,  G11B2020/10759 ,  G11B2020/1272 ,  G11B2220/2541

摘要： An optical disc drive includes a pickup head, a DSP coupled to the pickup head, a buffer memory, a decoder coupled to the DSP and the buffer memory, and a control unit coupled to the decoder. The pickup head reads data stored in a blu-ray disc to generate an electrical signal. The DSP receives the electrical signal from the pickup head, and generates an LDC block and a BIS block according to the electrical signal. The decoder receives the LDC block and the BIS block from the DSP, generates user data and control data according to the LDC block and the BIS block respectively, and stores the user data and the control data into the buffer memory. The control unit controls the operation of the decoder.

摘要翻译： 光盘驱动器包括拾取头，耦合到拾取头的DSP，缓冲存储器，耦合到DSP和缓冲存储器的解码器，以及耦合到解码器的控制单元。 拾取头读取存储在蓝光盘中的数据以产生电信号。 DSP从拾取头接收电信号，并根据电信号产生LDC块和BIS块。 解码器从DSP接收LDC块和BIS块，分别根据LDC块和BIS块生成用户数据和控制数据，并将用户数据和控制数据存储到缓冲存储器中。 控制单元控制解码器的操作。

公开(公告)号：US07543215B2

公开(公告)日：2009-06-02

申请号：US11056194

申请日：2005-02-14

申请人： Jia-Horng Shieh ,  Jyh-Shin Pan ,  Li-Lien Lin

发明人： Jia-Horng Shieh ,  Jyh-Shin Pan ,  Li-Lien Lin

IPC分类号： G11C29/00

CPC分类号： G11B20/1833 ,  G11B20/1217 ,  G11B2020/1222 ,  G11B2020/1836 ,  G11B2220/2541 ,  G11B2220/255 ,  G11B2220/2562 ,  G11B2220/2579

摘要： An integrated apparatus for multi-standard optical media includes a compact disc/digital versatile disc (CD/DVD) processor, a high-definition DVD (HDDVD) processor and a Blu-ray disc (BD) processor; a memory unit connected to the CD/DVD processor, the HDDVD processor and the BD processor to provide a storage resource; and a shared error correction code (ECC) engine for encoding or decoding the CD/DVD data stream, the HDDVD data stream and the BD data stream. Therein, the ECC engine further has a syndrome/parity generator to encode the data stream or to obtain the syndrome information from the data stream; and an erasure generator to obtain the possible error position information from the data stream. Thereby, the complexity and cost of the integrated apparatus can be reduced.

摘要翻译： 用于多标准光学介质的集成设备包括光盘/数字通用盘（CD / DVD）处理器，高清DVD（HDDVD）处理器和蓝光盘（BD）处理器） 连接到CD / DVD处理器的存储器单元，HDDVD处理器和BD处理器以提供存储资源; 以及用于对CD / DVD数据流进行编码或解码的共享纠错码（ECC）引擎，HDDVD数据流和BD数据流。 其中，ECC引擎还具有对数据流进行编码或从数据流获取校正子信息的校正子/奇偶校验发生器; 以及擦除发生器，以从数据流中获取可能的错误位置信息。 由此，能够降低集成装置的复杂性和成本。