-
1.发明授权Mapping technique for computing addresses in a memory of an intermediate network node 失效用于计算中间网络节点的存储器中的地址的映射技术公开(公告)号：US06976149B1
公开(公告)日：2005-12-13
申请号：US09790968
申请日：2001-02-22
CPC分类号： H04L49/3009 , H04L45/60
摘要： A mapping technique allows a forwarding engine of an intermediate node to efficiently compute a starting address within an internal packet memory (IPM) configured to hold a packet received at the node. The starting address is used by direct memory access logic to merge a trailer of the packet stored in the IPM with a modified packet header generated by the forwarding engine. However, the size of the IPM is preferably not a binary number that can be easily manipulated by the forwarding engine when computing the starting address of the packet within the IPM. Therefore, the technique automatically adjusts the starting address to map to a correct location if the address exceeds the size of the IPM, while obviating the need for the forwarding engine to consider a wrap-around condition when computing the starting address.
摘要翻译： 映射技术允许中间节点的转发引擎有效地计算内部分组存储器（IPM）中的起始地址，内部分组存储器（IPM）被配置为保存在节点处接收到的分组。 起始地址由直接存储器访问逻辑用于将存储在IPM中的分组的尾部与由转发引擎生成的修改的分组报头合并。 然而，IPM的大小优选地不是二进制数，当计算IPM内的分组的起始地址时，可以容易地由转发引擎来操纵二进制数。 因此，如果地址超过IPM的大小，该技术将自动调整起始地址以映射到正确的位置，同时避免在计算起始地址时转发引擎考虑环绕条件。
-
公开(公告)号：US5751710A
公开(公告)日：1998-05-12
申请号：US661424
申请日：1996-06-11
摘要： 057517104 An efficient connection technique maximizes the rate at which data are transferred among source and destination network cards of a distributed network switch. Such maximum data rates are achieved by interconnecting the network cards through a mesh backplane comprising a novel arrangement of direct and indirect paths between the cards and thereafter transferring the data over those paths. In accordance with the invention, the indirect data path utilizes an additional network card of the switch as a 2-hop relay to provide transfer rate efficiency between the source and destination cards.
摘要翻译： 057517104高效的连接技术可最大限度地提高数据在分布式网络交换机的源网卡和目的网卡之间传输的速率。 这样的最大数据速率通过网格背板互连网络来实现，网格背板包括在卡之间的直接和间接路径的新颖布置，然后通过这些路径传送数据。 根据本发明，间接数据路径使用交换机的附加网卡作为2跳中继来提供源卡和目的卡之间的传输速率效率。
-
公开(公告)号：US5859550A
公开(公告)日：1999-01-12
申请号：US877135
申请日：1997-06-16
申请人： William P. Brandt
发明人： William P. Brandt
CPC分类号： G06F1/10 , H03L7/08 , H04J3/0682 , H04J3/0685
摘要： A zero-delay buffer circuit includes a modified phase-locked loop (PLL) circuit configured to minimize clock skew among data output buffers of modules within a high-speed network switch system. Each module includes an application-specific integrated circuit (ASIC) chip that contains the modified PLL circuit; circuitry inserted within a feedback loop of the PLL is representative of a clock distribution tree that is common to the output buffers of the chip. The absolute delay of that tree typically differs among the ASICs because of process, voltage and temperature variations within the system. The circuitry inserted within the feedback loop effectively compensates for the absolute delay of the common distribution tree circuit components.
摘要翻译： 零延迟缓冲电路包括经修改的锁相环（PLL）电路，其被配置为使高速网络交换机系统内的模块的数据输出缓冲器之间的时钟偏移最小化。 每个模块包括专用集成电路（ASIC）芯片，其包含修改的PLL电路; 插入在PLL的反馈环路内的电路代表了芯片的输出缓冲器共有的时钟分配树。 由于系统内的过程，电压和温度变化，该树的绝对延迟通常因ASIC而异。 插入在反馈环路内的电路有效补偿了公共分配树电路元件的绝对延迟。
-
4.发明授权Automatic protection switching line card redundancy within an intermediate network node 失效在中间网络节点内自动保护交换线卡冗余公开(公告)号：US07065038B1
公开(公告)日：2006-06-20
申请号：US09796047
申请日：2001-02-28
摘要： An apparatus and technique configures an intermediate network node, such as an aggregation router, to implement automatic protection switching (APS) redundancy among its line cards in the event of a failure to one of those cards. The APS line card redundancy provides redundancy among a pair of line cards connected to a performance routing engine of the router. Internal APS data paths are implemented in the router through the provision of an alias logic circuit that selects packet data from one of an adjacent pair of line cards and sends identical copies of data to that adjacent pair of line cards.
摘要翻译： 一种装置和技术构成中间网络节点，例如聚合路由器，以便在发生故障的情况下，在其线卡之间实现自动保护倒换（APS）冗余。 APS线路卡冗余在连接到路由器的性能路由引擎的一对线路卡之间提供冗余。 内部APS数据路径通过提供一个别名逻辑电路在路由器中实现，该别名逻辑电路从相邻的一对线路卡之一中选择分组数据，并将相同的数据副本发送到相邻的线卡。
-
-
-
搜索结果
4 条记录 (耗时 0.019 秒)
