公开(公告)号：US06352910B1

公开(公告)日：2002-03-05

申请号：US09249041

申请日：1999-02-12

申请人： William R. Harshbarger ,  Takako Takehara ,  Jeff C. Olsen ,  Regina Qiu ,  Yvonne LeGrice ,  Guofu J. Feng ,  Robert M. Robertson ,  Kam Law

发明人： William R. Harshbarger ,  Takako Takehara ,  Jeff C. Olsen ,  Regina Qiu ,  Yvonne LeGrice ,  Guofu J. Feng ,  Robert M. Robertson ,  Kam Law

IPC分类号： H01L2120

CPC分类号： C23C16/24

摘要： Deposition methods for preparing amorphous silicon based films with controlled resistivity and low stress are described. Such films can be used as the interlayer in FED manufacturing. They can also be used in other electronic devices which require films with controlled resistivity in the range between those of an insulator and of a conductor. The deposition methods described in the present invention employ the method of chemical vapor deposition or plasma-enhanced chemical vapor deposition; other film deposition techniques, such as physical vapor deposition, also may be used. In one embodiment, an amorphous silicon-based film is formed by introducing into a deposition chamber a silicon-based volatile, a conductivity-increasing volatile including one or more components for increasing the conductivity of the amorphous silicon-based film, and a conductivity-decreasing volatile including one or more components for decreasing the conductivity of the amorphous silicon-based film.

摘要翻译： 描述了制备具有受控电阻率和低应力的非晶硅基膜的沉积方法。 这种膜可用作FED制造中的中间层。 它们也可用于需要具有在绝缘体和导体之间的范围内的受控电阻率的膜的其它电子器件。 本发明中描述的沉积方法采用化学气相沉积或等离子体增强化学气相沉积的方法; 也可以使用其它成膜技术，例如物理气相沉积。 在一个实施方案中，通过向沉积室中引入硅基挥发物，包含一种或多种用于增加非晶硅基膜的导电性的组分的增加电导率的挥发性，并且导电性 - 降低挥发性，包括一种或多种用于降低非晶硅基膜的导电性的组分。

公开(公告)号：US06857387B1

公开(公告)日：2005-02-22

申请号：US09563963

申请日：2000-05-03

申请人： Sheng Sun ,  Jeff C. Olsen ,  Sanjay Yadav ,  Quanyuan Shang ,  Kam S. Law

发明人： Sheng Sun ,  Jeff C. Olsen ,  Sanjay Yadav ,  Quanyuan Shang ,  Kam S. Law

IPC分类号： H05H1/46 ,  B01J19/08 ,  C23C16/34 ,  C23C16/509 ,  C23C16/52 ,  H01J37/32 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  C23C16/505 ,  C23F1/00 ,  H01L21/306

CPC分类号： C23C16/5096 ,  C23C16/345 ,  C23C16/52 ,  H01J37/32082 ,  H01J37/32165

摘要： An apparatus and method for fabricating an electronic workpiece in which first and second electrodes within a plasma chamber are respectively connected to low frequency and high frequency RF power supplies. At least one capacitor is connected between the first electrode and electrical ground. The one or more capacitors can reduce or eliminate the coupling of high frequency RF power to any plasma outside the region directly between the two electrodes. Consequently, the invention can improve the performance of the plasma process by concentrating more of the RF power in the region between the two electrodes.

摘要翻译： 一种用于制造电子工件的装置和方法，其中等离子体室内的第一和第二电极分别连接到低频和高频RF电源。 至少一个电容器连接在第一电极和电接地之间。 一个或多个电容器可以减少或消除高频RF功率与直接在两个电极之间的区域外的任何等离子体的耦合。 因此，本发明可以通过将更多的RF功率集中在两个电极之间的区域来提高等离子体处理的性能。