公开(公告)号：US10892323B2

公开(公告)日：2021-01-12

申请号：US16419021

申请日：2019-05-22

Applicant: Winbond Electronics Corp.

Inventor： Huang-Nan Chen ,  Ming-Chih Hsu

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L29/06 ,  H01L21/033 ,  H01L21/762 ,  H01L27/108

Abstract: A buried word line structure including a substrate, an isolation structure, and a buried word line is provided. The isolation structure is located in the substrate to define active regions separated from each other. The active regions extend in a first direction. The buried word line is located in the substrate. The buried word line extends through the isolation structure and the active regions in a second direction. The first direction intersects the second direction. The buried word line and the substrate are isolated from each other. The same buried word line includes a first portion and a second portion. The first portion is located in the active regions. The second portion is located in the isolation structure between two adjacent active regions in the first direction. A width of the first portion is greater than a width of the second portion.

公开(公告)号：US20200373386A1

公开(公告)日：2020-11-26

申请号：US16419021

申请日：2019-05-22

Applicant: Winbond Electronics Corp.

Inventor： Huang-Nan Chen ,  Ming-Chih Hsu

IPC: H01L29/06 ,  H01L21/033 ,  H01L21/762

Abstract: A buried word line structure including a substrate, an isolation structure, and a buried word line is provided. The isolation structure is located in the substrate to define active regions separated from each other. The active regions extend in a first direction. The buried word line is located in the substrate. The buried word line extends through the isolation structure and the active regions in a second direction. The first direction intersects the second direction. The buried word line and the substrate are isolated from each other. The same buried word line includes a first portion and a second portion. The first portion is located in the active regions. The second portion is located in the isolation structure between two adjacent active regions in the first direction. A width of the first portion is greater than a width of the second portion.

公开(公告)号：US12142539B2

公开(公告)日：2024-11-12

申请号：US17741412

申请日：2022-05-10

Applicant: Winbond Electronics Corp.

Inventor： Ming-Chih Hsu ,  Chiung-Lin Hsu

IPC: H01L23/00 ,  H01L21/66 ,  H10B12/00

Abstract: A semiconductor structure includes a substrate, a first support layer, and multiple support pillars. The substrate includes a monitoring region. The monitoring region includes a first region and a second region. The first support layer is located in the first region and the second region, and is located above the substrate. The support pillars are located in the second region. The support pillars penetrate the first support layer and are not connected to each other. Each of the support pillars extends toward the substrate.

公开(公告)号：US20230369145A1

公开(公告)日：2023-11-16

申请号：US17741412

申请日：2022-05-10

Applicant: Winbond Electronics Corp.

Inventor： Ming-Chih Hsu ,  Chiung-Lin Hsu

IPC: H01L21/66 ,  H01L23/00 ,  H01L27/108

CPC classification number: H01L22/34 ,  H01L23/562 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10885 ,  H01L27/10888

Abstract: A semiconductor structure includes a substrate, a first support layer, and multiple support pillars. The substrate includes a monitoring region. The monitoring region includes a first region and a second region. The first support layer is located in the first region and the second region, and is located above the substrate. The support pillars are located in the second region. The support pillars penetrate the first support layer and are not connected to each other. Each of the support pillars extends toward the substrate.

公开(公告)号：US11211386B2

公开(公告)日：2021-12-28

申请号：US16409893

申请日：2019-05-13

Applicant: Winbond Electronics Corp.

Inventor： Ming-Chih Hsu ,  Yi-Hao Chien ,  Huang-Nan Chen

IPC: H01L27/108 ,  H01L23/528

Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a dielectric layer disposed on the substrate, bit lines disposed on the dielectric layer, spacers and a contact. The substrate has active areas arranged in parallel with each other. The bit lines are arranged in parallel with each other. Each bit line is partially overlapped with the corresponding active area. Each bit line has first portions and second portions arranged alternately in an extending direction thereof, and a width of the first portions is smaller than that of the second portions. The spacers are disposed on the sidewalls of each bit line. The contact is disposed between the adjacent bit lines and adjacent to the corresponding first portion of at least one of the adjacent bit lines, penetrates through the dielectric layer, and is in contact with the corresponding active area.