公开(公告)号：US20240072131A1

公开(公告)日：2024-02-29

申请号：US18504344

申请日：2023-11-08

Applicant: Wolfspeed, Inc.

Inventor： Daniel Jenner Lichtenwalner ,  Edward Robert Van Brunt ,  Thomas E. Harrington, III ,  Shadi Sabri ,  Brett Hull ,  Brice McPherson ,  Joe W. McPherson

IPC: H01L29/40

CPC classification number: H01L29/404 ,  H01L29/1608

Abstract: Strategic placement and patterning of electrodes, vias, and metal runners can significantly reduce strain in a power semiconductor die. By modifying the path defining electrodes, vias, and metal runners, as well as patterning the material layers thereof, strain can be better managed to increase reliability of a power semiconductor die.

公开(公告)号：US12159909B2

公开(公告)日：2024-12-03

申请号：US18504344

申请日：2023-11-08

Applicant: Wolfspeed, Inc.

Inventor： Daniel Jenner Lichtenwalner ,  Edward Robert Van Brunt ,  Thomas E. Harrington, III ,  Shadi Sabri ,  Brett Hull ,  Brice McPherson ,  Joe W. McPherson

IPC: H01L29/40 ,  H01L29/16

Abstract: Strategic placement and patterning of electrodes, vias, and metal runners can significantly reduce strain in a power semiconductor die. By modifying the path defining electrodes, vias, and metal runners, as well as patterning the material layers thereof, strain can be better managed to increase reliability of a power semiconductor die.

公开(公告)号：US11869948B2

公开(公告)日：2024-01-09

申请号：US17177641

申请日：2021-02-17

Applicant: Wolfspeed, Inc.

Inventor： Daniel Jenner Lichtenwalner ,  Edward Robert Van Brunt ,  Thomas E. Harrington, III ,  Shadi Sabri ,  Brett Hull ,  Brice McPherson ,  Joe W. McPherson

IPC: H01L29/40 ,  H01L29/16

CPC classification number: H01L29/404 ,  H01L29/1608

Abstract: Strategic placement and patterning of electrodes, vias, and metal runners can significantly reduce strain in a power semiconductor die. By modifying the path defining electrodes, vias, and metal runners, as well as patterning the material layers thereof, strain can be better managed to increase reliability of a power semiconductor die.