VOLTAGE SENSING CIRCUIT CAPABLE OF CONTROLLING A PUMP VOLTAGE STABLY GENERATED IN A LOW VOLTAGE ENVIRONMENT
    1.
    发明申请
    VOLTAGE SENSING CIRCUIT CAPABLE OF CONTROLLING A PUMP VOLTAGE STABLY GENERATED IN A LOW VOLTAGE ENVIRONMENT 有权
    电压感应电路可控制在低电压环境中稳定产生的泵电压

    公开(公告)号:US20110210794A1

    公开(公告)日:2011-09-01

    申请号:US13101411

    申请日:2011-05-05

    IPC分类号: H03F3/45

    CPC分类号: G11C5/145

    摘要: Herein, a voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.

    摘要翻译: 这里,提供了能够在低电压环境下稳定地产生泵浦电压的电压检测电路。 电压检测电路包括具有第一和第二端子的电流镜,第一开关元件,被配置为通过参考电压来控制电流镜的第一端子上的电流;第二开关元件,被配置为控制来自电流的第二端子的电流 响应于泵浦电压反射镜;以及第三开关元件,其被配置为控制第一和第二开关元件的电流源以接收负电压。

    Voltage sensing circuit capable of controlling a pump voltage stably generated in a low voltage environment
    2.
    发明授权
    Voltage sensing circuit capable of controlling a pump voltage stably generated in a low voltage environment 有权
    电压检测电路能够控制在低电压环境下稳定产生的泵浦电压

    公开(公告)号:US08203891B2

    公开(公告)日:2012-06-19

    申请号:US13101558

    申请日:2011-05-05

    IPC分类号: G11C5/14

    CPC分类号: G11C5/145

    摘要: A voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.

    摘要翻译: 提供了能够控制在低电压环境下稳定产生的泵浦电压的电压检测电路。 电压检测电路包括具有第一和第二端子的电流镜,第一开关元件,被配置为通过参考电压来控制电流镜的第一端子上的电流;第二开关元件,被配置为控制来自电流的第二端子的电流 响应于泵浦电压反射镜;以及第三开关元件,其被配置为控制第一和第二开关元件的电流源以接收负电压。

    VOLTAGE SENSING CIRCUIT CAPABLE OF CONTROLLING A PUMP VOLTAGE STABLY GENERATED IN A LOW VOLTAGE ENVIRONMENT

    公开(公告)号:US20110242920A1

    公开(公告)日:2011-10-06

    申请号:US13101558

    申请日:2011-05-05

    IPC分类号: G11C7/06

    CPC分类号: G11C5/145

    摘要: Herein, a voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.

    VOLTAGE SENSING CIRCUIT AND METHOD FOR OPERATING THE SAME
    4.
    发明申请
    VOLTAGE SENSING CIRCUIT AND METHOD FOR OPERATING THE SAME 失效
    电压感应电路及其操作方法

    公开(公告)号:US20090175095A1

    公开(公告)日:2009-07-09

    申请号:US12134825

    申请日:2008-06-06

    IPC分类号: G11C5/14 G05F1/10

    CPC分类号: G11C5/145

    摘要: A voltage sensing circuit is capable of controlling a pumping voltage to be stably generated in a low voltage environment. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.

    摘要翻译: 电压检测电路能够控制在低电压环境下稳定地产生的泵浦电压。 电压检测电路包括具有第一和第二端子的电流镜,第一开关元件,被配置为通过参考电压来控制电流镜的第一端子上的电流;第二开关元件,被配置为控制来自电流的第二端子的电流 响应于泵浦电压反射镜;以及第三开关元件,其被配置为控制第一和第二开关元件的电流源以接收负电压。

    Voltage sensing circuit capable of controlling a pump voltage stably generated in a low voltage environment
    5.
    发明授权
    Voltage sensing circuit capable of controlling a pump voltage stably generated in a low voltage environment 有权
    电压检测电路能够控制在低电压环境下稳定产生的泵浦电压

    公开(公告)号:US08339871B2

    公开(公告)日:2012-12-25

    申请号:US13101411

    申请日:2011-05-05

    IPC分类号: G11C5/14 G05F1/565

    CPC分类号: G11C5/145

    摘要: Herein, a voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.

    摘要翻译: 这里,提供能够控制在低电压环境下稳定产生的泵浦电压的电压检测电路。 电压检测电路包括具有第一和第二端子的电流镜,第一开关元件,被配置为通过参考电压来控制电流镜的第一端子上的电流;第二开关元件,被配置为控制来自电流的第二端子的电流 响应于泵浦电压反射镜;以及第三开关元件,其被配置为控制第一和第二开关元件的电流源以接收负电压。

    Voltage sensing circuit capable of controlling a pump voltage stably generated in a low voltage environment
    6.
    发明授权
    Voltage sensing circuit capable of controlling a pump voltage stably generated in a low voltage environment 失效
    电压检测电路能够控制在低电压环境下稳定产生的泵浦电压

    公开(公告)号:US07961531B2

    公开(公告)日:2011-06-14

    申请号:US12134825

    申请日:2008-06-06

    IPC分类号: G11C5/14

    CPC分类号: G11C5/145

    摘要: Herein, a voltage sensing circuit, which is capable of controlling a pumping voltage to be stably generated in a low voltage environment, is provided. The voltage sensing circuit includes a current mirror having first and second terminals, a first switching element configured to control current on the first terminal of the current mirror by a reference voltage, a second switching element configured to control current from the second terminal of the current mirror in response to a pumping voltage, and a third switching element configured to control current sources of the first and second switching elements to receive a negative voltage.

    摘要翻译: 这里,提供了能够在低电压环境下稳定地产生泵浦电压的电压检测电路。 电压检测电路包括具有第一和第二端子的电流镜,第一开关元件,被配置为通过参考电压来控制电流镜的第一端子上的电流;第二开关元件,被配置为控制来自电流的第二端子的电流 响应于泵浦电压反射镜;以及第三开关元件,其被配置为控制第一和第二开关元件的电流源以接收负电压。

    Power-up circuit for semiconductor memory device
    7.
    发明授权
    Power-up circuit for semiconductor memory device 有权
    半导体存储器件的上电电路

    公开(公告)号:US08035428B2

    公开(公告)日:2011-10-11

    申请号:US12495282

    申请日:2009-06-30

    申请人: Khil-Ohk Kang

    发明人: Khil-Ohk Kang

    IPC分类号: H03L7/00

    CPC分类号: H03K17/20 G11C5/143

    摘要: A power-up circuit for a semiconductor memory device includes a voltage division unit configured to divide a power supply voltage, a first power-up generation unit configured to detect a voltage level of a first divided voltage of the voltage division unit during an initial stage of applying a power supply to generate a first power-up signal and a second power-up generation unit configured to detect a voltage level of a second divided voltage of the voltage division unit, after the first power-up signal is generated from the first power-up generation unit, to generate a second power-up signal.

    摘要翻译: 半导体存储器件的上电电路包括:分压单元,被配置为分配电源电压;第一上电生成单元,被配置为在初始阶段检测分压单元的第一分压的电压电平 施加电源以产生第一上电信号;以及第二上电生成单元,被配置为在从所述第一上电信号生成所述第一上电信号之后检测所述分压单元的第二分压的电压电平 上电生成单元,以产生第二上电信号。

    Circuit and method of generating voltage of semiconductor memory apparatus
    8.
    发明授权
    Circuit and method of generating voltage of semiconductor memory apparatus 失效
    电路和半导体存储装置的电压产生方法

    公开(公告)号:US07936633B2

    公开(公告)日:2011-05-03

    申请号:US12575663

    申请日:2009-10-08

    申请人: Khil-Ohk Kang

    发明人: Khil-Ohk Kang

    IPC分类号: G11C5/14

    CPC分类号: G11C5/14 G11C11/4074

    摘要: A circuit for generating a voltage of a semiconductor memory apparatus includes a control unit that outputs a driving control signal in response to an enable signal and a burn-in signal, a first voltage generating unit that generates and outputs a first voltage in response to the enable signal, and a voltage maintaining unit that maintains the first voltage in response to the driving control signal.

    摘要翻译: 用于产生半导体存储装置的电压的电路包括:控制单元,其响应于使能信号和老化信号而输出驱动控制信号;第一电压产生单元,其响应于第二电压产生并输出第一电压 使能信号,和维持单元,其维持响应于驱动控制信号的第一电压。

    Semiconductor memory device and method of inputting addresses therein
    9.
    发明授权
    Semiconductor memory device and method of inputting addresses therein 失效
    半导体存储器件及其中输入地址的方法

    公开(公告)号:US07697368B2

    公开(公告)日:2010-04-13

    申请号:US11967577

    申请日:2007-12-31

    申请人: Khil-Ohk Kang

    发明人: Khil-Ohk Kang

    IPC分类号: G11C11/00

    摘要: A semiconductor memory device is capable of reducing a test time by sharing input pins of addresses for the test, thereby reducing test costs also. The semiconductor memory device includes first and second address buffer units. The first address buffer unit is configured to transmit a plurality of normal addresses to an internal circuit and store one or more of the received normal addresses. The second address buffer unit is configured to transmit one or more external bank addresses to the internal circuit as internal bank addresses in a normal mode and transmit addresses stored in the first address buffer unit to the internal circuit as the internal bank addresses in a test mode.

    摘要翻译: 半导体存储器件能够通过共享用于测试的地址的输入引脚来减少测试时间,从而降低测试成本。 半导体存储器件包括第一和第二地址缓冲器单元。 第一地址缓冲器单元被配置为向内部电路发送多个正常地址,并且存储所接收的正常地址中的一个或多个。 第二地址缓冲器单元被配置为将内部电路中的一个或多个外部存储体地址作为正常模式的内部存储体地址发送,并且将内部存储在第一地址缓冲器单元中的地址作为内部存储体以测试模式地址发送到内部电路 。

    Semiconductor memory device and method of operating the same
    10.
    发明申请
    Semiconductor memory device and method of operating the same 有权
    半导体存储器件及其操作方法

    公开(公告)号:US20090168553A1

    公开(公告)日:2009-07-02

    申请号:US12217045

    申请日:2008-06-30

    申请人: Khil-Ohk Kang

    发明人: Khil-Ohk Kang

    IPC分类号: G11C7/00

    摘要: Semiconductor memory device and method of operating the same includes an enable signal generator configured to generate first and second enable signals having activation timings determined in response to activation of an active command, the first enable signal being deactivated after a first time from a deactivation timing of the active command, and the second enable signal being deactivated after a second time longer than the first time from the deactivation timing of the active command. Internal voltage generators are configured to generate internal voltages. At least one of the internal voltage generators is turned on/off in response to the first enable signal, and at least one other of the internal voltage generators is turned on/off in response to the second enable signals.

    摘要翻译: 半导体存储器件及其操作方法包括使能信号发生器,其被配置为产生具有响应于有效命令的激活而确定的激活定时的第一和第二使能信号,所述第一使能信号在第一次从停止定时 所述激活命令和所述第二使能信号在从所述激活命令的去激活定时开始的第二时间长于所述第一时间之后被去激活。 内部电压发生器配置为产生内部电压。 内部电压发生器中的至少一个响应于第一使能信号而导通/截止,并且内部电压发生器中的至少一个响应于第二使能信号而导通/截止。