公开(公告)号：US20060181932A1

公开(公告)日：2006-08-17

申请号：US11405993

申请日：2006-04-18

申请人： Woo-yeong Cho ,  Kyung-hee Kim

发明人： Woo-yeong Cho ,  Kyung-hee Kim

IPC分类号： G11C16/06

CPC分类号： G11C13/0064 ,  G11C7/12 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0026 ,  G11C13/0061 ,  G11C13/0069 ,  G11C29/02 ,  G11C29/028 ,  G11C29/50012 ,  G11C2013/0066 ,  G11C2013/0092

摘要： A circuit and method for programming phase-change memory devices, such as chalcogenide memory (PRAM), are described. The invention is directed to an approach to programming PRAM elements from a reset state to a set state or from a set state to the set state. The invention provides a novel and nonobvious PRAM device and method in which a set pulse duration time is controlled by monitoring the state of the memory element during programming such as by comparing the voltage of a bit line with a reference voltage or comparing the cell resistance with a set state cell resistance. The duration of the set pulse is controlled in response to the detected state of the memory element. The result of the approach of the invention is the significant reduction in PRAM programming errors, such as those caused by a constant-duration set pulse, as well as reduction in programming time duration and power consumption.

公开(公告)号：US07180771B2

公开(公告)日：2007-02-20

申请号：US11405993

申请日：2006-04-18

申请人： Woo-yeong Cho ,  Kyung-hee Kim

发明人： Woo-yeong Cho ,  Kyung-hee Kim

IPC分类号： G11C11/00

CPC分类号： G11C13/0064 ,  G11C7/12 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0026 ,  G11C13/0061 ,  G11C13/0069 ,  G11C29/02 ,  G11C29/028 ,  G11C29/50012 ,  G11C2013/0066 ,  G11C2013/0092

摘要： A circuit and method for programming phase-change memory devices, such as chalcogenide memory (PRAM), are described. The invention is directed to an approach to programming PRAM elements from a reset state to a set state or from a set state to the set state. The invention provides a novel and nonobvious PRAM device and method in which a set pulse duration time is controlled by monitoring the state of the memory element during programming such as by comparing the voltage of a bit line with a reference voltage or comparing the cell resistance with a set state cell resistance. The duration of the set pulse is controlled in response to the detected state of the memory element. The result of the approach of the invention is the significant reduction in PRAM programming errors, such as those caused by a constant-duration set pulse, as well as reduction in programming time duration and power consumption.

摘要翻译： 描述了用于编程相变存储器件（例如硫族化物存储器（PRAM））的电路和方法。 本发明涉及将PRAM元件从复位状态编程到设置状态或从设置状态到设置状态的方法。 本发明提供了一种新颖且不显而易见的PRAM器件和方法，其中通过在编程期间监视存储元件的状态来控制设定脉冲持续时间，例如通过将位线的电压与参考电压进行比较或将电池电阻与 设定状态电池电阻。 响应于检测到的存储元件的状态来控制设定脉冲的持续时间。 本发明的方法的结果是PRAM编程错误的显着降低，例如由恒定持续时间设置脉冲引起的错误，以及减少编程持续时间和功耗。

公开(公告)号：US07085154B2

公开(公告)日：2006-08-01

申请号：US10773901

申请日：2004-02-06

申请人： Woo-yeong Cho ,  Kyung-hee Kim

发明人： Woo-yeong Cho ,  Kyung-hee Kim

IPC分类号： G11C11/00

CPC分类号： G11C13/0064 ,  G11C7/12 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0026 ,  G11C13/0061 ,  G11C13/0069 ,  G11C29/02 ,  G11C29/028 ,  G11C29/50012 ,  G11C2013/0066 ,  G11C2013/0092

摘要： A circuit and method for programming phase-change memory devices, such as chalcogenide memory (PRAM), are described. The invention is directed to an approach to programming PRAM elements from a reset state to a set state or from a set state to the set state. The invention provides a novel and nonobvious PRAM device and method in which a set pulse duration time is controlled by monitoring the state of the memory element during programming such as by comparing the voltage of a bit line with a reference voltage or comparing the cell resistance with a set state cell resistance. The duration of the set pulse is controlled in response to the detected state of the memory element. The result of the approach of the invention is the significant reduction in PRAM programming errors, such as those caused by a constant-duration set pulse, as well as reduction in programming time duration and power consumption.

摘要翻译： 描述了用于编程相变存储器件（例如硫族化物存储器（PRAM））的电路和方法。 本发明涉及将PRAM元件从复位状态编程到设置状态或从设置状态到设置状态的方法。 本发明提供了一种新颖且不显而易见的PRAM器件和方法，其中通过在编程期间监视存储元件的状态来控制设定脉冲持续时间，例如通过将位线的电压与参考电压进行比较或将电池电阻与 设定状态电池电阻。 响应于检测到的存储元件的状态来控制设定脉冲的持续时间。 本发明的方法的结果是PRAM编程错误的显着降低，例如由恒定持续时间设置脉冲引起的错误，以及减少编程持续时间和功耗。