公开(公告)号：US12026332B2

公开(公告)日：2024-07-02

申请号：US17753637

申请日：2021-05-19

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Changzhi Wu ,  Ying Sun ,  Yumin Xu

IPC: G06F3/041

CPC classification number: G06F3/0412 ,  G06F3/04164

Abstract: The display panel includes at least one first touch area group and multiple touch wires; the at least one first touch area group includes two rows and N columns of touch electrodes; and each touch wire is electrically connected to a respective one touch electrode. The display panel further includes a first detection circuit and a second detection circuit; and each touch electrode is separately electrically connected to the first detection circuit and the second detection circuit by a respective one touch wire. The touch short-circuit detection stage includes a first detection stage. The detection method includes providing, at the first detection stage, a short-circuit detection signal for a touch electrode in the first touch electrode row by the first detection circuit; and determining, according to a short-circuit feedback signal generated by the second detection circuit, whether adjacent ones of the touch electrodes located in a same column are short-circuited.

公开(公告)号：US11042238B1

公开(公告)日：2021-06-22

申请号：US16823858

申请日：2020-03-19

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd

Inventor： Tingting Zhang ,  Changzhi Wu ,  Ying Sun ,  Yumin Xu

IPC: G06F3/041 ,  H05K1/18 ,  G06K9/00

Abstract: A display panel, having a display area where display units, touch electrodes, and fingerprint identification units are arranged, and a non-display area including first to third bonding areas, the second and third bonding areas being located on two sides of the first bonding area, respectively. First pads, second pads, and third pads are arranged in the bonding areas, and the number of the first pads is greater than the number of the third pads, and the number of the second pads is greater than the number of the third pads. One or more first pads, one or more second pads, and one or more third pads are arranged in the first bonding area alternately. Each of the second bonding area and the third bonding area is provided with one or more first pads and one or more second pads. A display device includes the display panel.

公开(公告)号：US12057045B2

公开(公告)日：2024-08-06

申请号：US18139054

申请日：2023-04-25

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Sijian Luo ,  Changzhi Wu ,  Yumin Xu

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G09G3/20 ,  G09G2310/0243 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/062 ,  G09G2310/08 ,  G11C19/287

Abstract: Provided is a display panel. The display panel includes multiple scanning lines, a gate driver circuit, and a timing controller. The timing controller is configured to: receive multiple data enable signals, generate a gate control signal, and provide the gate control signal for the gate driver circuit. The gate control signal includes a start signal, a first clock signal and a second clock signal. The multiple data enable signals are only within the active cycle. The timing controller is configured to generate a rising edge and a falling edge of the start signal within a time interval formed by a rising edge and a falling edge of a first data enable signal in the Nth frame cycle.

公开(公告)号：US11768413B2

公开(公告)日：2023-09-26

申请号：US17418130

申请日：2020-07-01

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Changzhi Wu ,  Ying Sun ,  Yumin Xu

IPC: G02F1/1362 ,  G09G3/3266 ,  G09G3/36 ,  H10K59/131 ,  H10K59/35

CPC classification number: G02F1/136286 ,  G09G3/3266 ,  G09G3/3677 ,  H10K59/131 ,  H10K59/353 ,  G09G2310/0286

Abstract: Provided are an array substrate, a display panel, a display device, and a driving method. The array substrate includes a plurality of pixel circuit rows arranged in sequence in a column direction, where each pixel circuit row includes a plurality of pixel circuits arranged in a row direction; and a plurality of scan line groups arranged in sequence in the column direction, where the scan line groups are in one-to-one correspondence with the pixel circuit rows. The each pixel circuit row includes a plurality of pixel circuit groups. Each scan line group includes a plurality of scan lines. Each scan line extends in the row direction. The pixel circuit groups are in one-to-one correspondence with the scan lines in a scan line group corresponding to the pixel circuit groups.

公开(公告)号：US11705035B2

公开(公告)日：2023-07-18

申请号：US17256631

申请日：2020-02-12

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Huiying Chen ,  Changzhi Wu ,  Ying Sun ,  Yumin Xu

IPC: G09G3/20 ,  G09G3/36 ,  G09G3/3266 ,  G11C19/28 ,  G02F1/1362 ,  H10K59/131

CPC classification number: G09G3/20 ,  G02F1/136286 ,  G09G3/3266 ,  G09G3/3648 ,  G09G3/3674 ,  G09G3/3677 ,  G09G2230/00 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0283 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2330/06 ,  G09G2380/10 ,  G11C19/28 ,  H10K59/131

Abstract: Provided are a display panel and a display device. The display panel includes multiple cascaded gate drive units. Each gate drive unit includes a shift register unit and an inverted unit. The inverted unit is electrically connected to the shift register unit. A scan output terminal of the shift register unit is electrically connected to one scan line. An inverted scan output terminal of the inverted unit is electrically connected to one inverted scan line. The scan output terminal of the shift register unit outputs a first effective pulse signal. The inverted scan output terminal of the inverted unit outputs a second effective pulse signal. A time period corresponding to the first effective pulse signal at least partially overlaps a time period corresponding to the second effective pulse signal, and the type of the first effective pulse signal is opposite to the type of the second effective pulse signal.

公开(公告)号：US10559604B2

公开(公告)日：2020-02-11

申请号：US16219960

申请日：2018-12-14

Applicant: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD.

Inventor： Xiaojing Zhan ,  Huangyao Wu ,  Jinyuan Liao ,  Changzhi Wu

IPC: G09G3/20 ,  H01L27/12

Abstract: An array substrate, a gate driving circuit and a display panel are provided. The array substrate includes a first display area, a second display area and an opening area. The opening area is surrounded by the first display area. Among the sub-pixels in the first display area, the sub-pixels in at least two adjacent columns are connected to a same first data line. Among the two sub-pixels in the same row electrically connected to the same first data line, one sub-pixel is connected to the first gate line, and the other sub-pixel is connected to the second gate line. For the sub-pixels in the second display area, the sub-pixels in different columns are connected to different second data lines, and the sub-pixels in different rows are connected to different gate lines.

公开(公告)号：US11676521B2

公开(公告)日：2023-06-13

申请号：US17443240

申请日：2021-07-22

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Sijian Luo ,  Changzhi Wu ,  Yumin Xu

IPC: G09G3/20 ,  G11C19/28

CPC classification number: G09G3/20 ,  G09G2310/0243 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/062 ,  G09G2310/08 ,  G11C19/287

Abstract: Provided is a display panel. The display panel includes multiple scanning lines, a gate driver circuit, and a timing controller. The timing controller is configured to: receive multiple data enable signals, generate a gate control signal, and provide the gate control signal for the gate driver circuit. The gate control signal includes a start signal, a first clock signal and a second clock signal. The multiple data enable signals are only within the active cycle. The timing controller is configured to generate a rising edge of the start signal within the vertical blanking cycle of the (N−1)th frame cycle. Alternatively, the timing controller is configured to generate a rising edge and a falling edge of the start signal within a time interval formed by a rising edge and a falling edge of a first data enable signal in the Nth frame cycle.

公开(公告)号：US20220284842A1

公开(公告)日：2022-09-08

申请号：US17256631

申请日：2020-02-12

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Huiying Chen ,  Changzhi Wu ,  Ying Sun ,  Yumin Xu

IPC: G09G3/20

Abstract: Provided are a display panel and a display device. The display panel includes multiple cascaded gate drive units. Each gate drive unit includes a shift register unit and an inverted unit. The inverted unit is electrically connected to the shift register unit. A scan output terminal of the shift register unit is electrically connected to one scan line. An inverted scan output terminal of the inverted unit is electrically connected to one inverted scan line. The scan output terminal of the shift register unit outputs a first effective pulse signal. The inverted scan output terminal of the inverted unit outputs a second effective pulse signal. A time period corresponding to the first effective pulse signal at least partially overlaps a time period corresponding to the second effective pulse signal, and the type of the first effective pulse signal is opposite to the type of the second effective pulse signal.

公开(公告)号：US20210375178A1

公开(公告)日：2021-12-02

申请号：US17443240

申请日：2021-07-22

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Sijian Luo ,  Changzhi Wu ,  Yumin Xu

IPC: G09G3/20

Abstract: Provided is a display panel. The display panel includes multiple scanning lines, a gate driver circuit, and a timing controller. The timing controller is configured to: receive multiple data enable signals, generate a gate control signal, and provide the gate control signal for the gate driver circuit. The gate control signal includes a start signal, a first clock signal and a second clock signal. The multiple data enable signals are only within the active cycle. The timing controller is configured to generate a rising edge of the start signal within the vertical blanking cycle of the (N−1)th frame cycle. Alternatively, the timing controller is configured to generate a rising edge and a falling edge of the start signal within a time interval formed by a rising edge and a falling edge of a first data enable signal in the Nth frame cycle.

公开(公告)号：US10082905B2

公开(公告)日：2018-09-25

申请号：US15452774

申请日：2017-03-08

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

Inventor： Jun Tu ,  Changzhi Wu ,  Kangpeng Yang ,  Yumin Xu ,  Mingchao Hou

IPC: G06F3/041 ,  G06F3/044 ,  G11C19/00 ,  G09G3/20

CPC classification number: G06F3/0416 ,  G06F3/0412 ,  G06F3/044 ,  G09G3/20 ,  G09G2310/0286 ,  G11C19/00

Abstract: A touch control display panel and a touch control display device are provided. The touch control display panel comprises a shift register including a plurality of cascaded shift register units, wherein a scanning line is electrically connected to an output terminal of a shift register unit; a touch driving electrode array including a plurality of touch driving electrodes; a touch switching control circuit and a plurality of touch signal lines, wherein a touch signal line has one end electrically connected to a touch driving electrode and the other end electrically connected to an output terminal of the touch switching control circuit; and a touch signal control line cluster including a plurality of touch signal control lines, wherein a touch signal control line has one end electrically connected to the output terminal of the shift register unit, and the other end electrically connected to the touch switching control circuit.