公开(公告)号：US20240428848A1

公开(公告)日：2024-12-26

申请号：US18213647

申请日：2023-06-23

Applicant: XILINX, INC.

Inventor： Nui CHONG ,  Jing Jing CHEN ,  Babruwahan Tulshiram GADE ,  Shidong ZHOU

IPC: G11C11/4093 ,  G11C11/4099

Abstract: A memory device includes a first bit cell comprising a first inverter, the first inverter comprising a p-type transistor coupled to an n-type transistor, and header circuitry coupled to the first inverter and comprising a first header transistor and a second header transistor, the first header transistor having a gate configured to receive a bias voltage, the second header transistor having a gate configured to receive a reference voltage.