公开(公告)号：US20240329126A1

公开(公告)日：2024-10-03

申请号：US18128947

申请日：2023-03-30

Applicant: XILINX, INC.

Inventor： Dinesh D. GAITONDE ,  Matthew H. KLEIN ,  Himanshu VERMA ,  Chirag RAVISHANKAR ,  Maithilee Rajendra KULKARNI

IPC: G01R31/28

CPC classification number: G01R31/2896 ,  G01R31/287

Abstract: Embodiments herein describe assigning integrated circuits with defects as variants of the integrated circuit design. Each variant can deactivate different circuitry in the integrated circuit design. A location of the defect can be matched to a variant that has a deactivated region that covers the defect. The integrated circuit can then be assigned to that variant.