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公开(公告)号:US20160142322A1
公开(公告)日:2016-05-19
申请号:US14676679
申请日:2015-04-01
申请人: XPLIANT, Inc
发明人: Srinath Atluri , Weihuang Wang , Weinan Ma
IPC分类号: H04L12/813
CPC分类号: H04L47/20 , H04L12/5602 , H04L27/2655 , H04L27/2689 , H04L29/0854 , H04L47/627 , H04L49/503 , H04L67/2852
摘要: A policer system on one or more place and/or route blocks. The policer system including a plurality of local physical policers each stored in a plurality of physical memory banks and coupled with a plurality of global policers stored in one or more global banks separate from the physical banks. Thus, each bank of the global policers are able to represent a logical combination of a plurality of the physical banks of physical policers.
摘要翻译: 一个或多个地点和/或路线区块上的一个监视器系统。 该策略器系统包括多个本地物理策略器,每个存储在多个物理存储器中并与存储在与物理存储体分开的一个或多个全局银行中的多个全局策略器耦合。 因此,每一家全球监管机构都能够代表物理监管者的多个实体库的逻辑组合。
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公开(公告)号:US20160134536A1
公开(公告)日:2016-05-12
申请号:US14536937
申请日:2014-11-10
申请人: XPLIANT, Inc
发明人: Weihuang Wang , Tsahi Daniel , Srinath Atluri
IPC分类号: H04L12/743
CPC分类号: H04L45/7453 , H04L45/7457
摘要: Embodiments of the present invention are directed to a wildcard matching solution that uses a combination of static random access memories (SRAMs) and ternary content addressable memories (TCAMs) in a hybrid solution. In particular, the wildcard matching solution uses a plurality of SRAM pools for lookup and a spillover TCAM pool for unresolved hash conflicts.
摘要翻译: 本发明的实施例涉及在混合解决方案中使用静态随机存取存储器(SRAM)和三元内容寻址存储器(TCAM)的组合的通配符匹配解决方案。 特别地,通配符匹配解决方案使用多个用于查找的SRAM池和用于未解决的散列冲突的溢出TCAM池。
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公开(公告)号:US20150365339A1
公开(公告)日:2015-12-17
申请号:US14302343
申请日:2014-06-11
申请人: XPLIANT, Inc.
发明人: Weihuang Wang , Srinath Atluri
IPC分类号: H04L12/863 , H04L12/861
CPC分类号: H04L47/6245 , H04L49/9084
摘要: Embodiments of the present invention relate to an architecture that extends counter life by provisioning each counter for an average case and handles overflow via an overflow FIFO and an interrupt to a process monitoring the counters. This architecture addresses a general optimization problem, which can be stated as, given N counters, for a certain CPU read interval T, of how to minimize the number of storage bits needed to store and operate these N counters. Equivalently, this general optimization problem can also be stated as, given N counters and a certain amount of storage bits, of how to optimize and increase CPU read interval T. This architecture extends the counter CPU read interval linearly with depth of the overflow FIFO.
摘要翻译: 本发明的实施例涉及一种架构,其通过为平均情况提供每个计数器来延长计数器的使用寿命,并通过溢出FIFO和中断处理溢出以监控计数器的进程。 该架构解决了一般的优化问题,对于某个CPU读取间隔T,可以将N个计数器表示为如何最小化存储和操作这些N个计数器所需的存储位数。 同样地,这个一般的优化问题也可以表示为给定N个计数器和一定量的存储位,如何优化和增加CPU读取间隔T.该架构使计数器CPU读取间隔与溢出FIFO的深度呈线性关系。
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4.
公开(公告)号:US09553829B2
公开(公告)日:2017-01-24
申请号:US14540927
申请日:2014-11-13
申请人: XPLIANT, INC.
发明人: Weihuang Wang , Mohan Balan , Srinath Atluri
IPC分类号: H04L12/28 , H04L12/931 , H04L12/747 , H04L12/773 , H04L12/741 , H04L12/771
CPC分类号: H04L49/65 , H04L45/54 , H04L45/563 , H04L45/60 , H04L45/742
摘要: A network switch comprises a plurality of packet processing units configured to process a received packet through multiple packet processing stages based on search result of a table. The network switch further comprises one or more memory units configured to maintain the table to be searched and provide the search result to the packet processing units. The network switch further comprises a table managing unit configured to accept a plurality of rules on bulk update to the table specified by a control unit, and perform the bulk update on the table based on the rules specified by the control unit without the control unit accessing the table directly for the bulk update.
摘要翻译: 网络交换机包括多个分组处理单元,其被配置为基于表的搜索结果通过多个分组处理阶段处理接收到的分组。 网络交换机还包括一个或多个存储器单元,其被配置为维护要搜索的表并将搜索结果提供给分组处理单元。 网络交换机还包括表管理单元,被配置为接受对由控制单元指定的表的批量更新的多个规则,并且基于由控制单元指定的规则在表上执行批量更新,而没有控制单元访问 该表直接为批量更新。
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