公开(公告)号：US20210200979A1

公开(公告)日：2021-07-01

申请号：US16896783

申请日：2020-06-09

Applicant: Xiamen Tianma Micro-Electronics Co.,Ltd.

Inventor： Fuyin LIN ,  Shaoting LIN ,  Hailiang WANG ,  Bozhi LIU

IPC: G06K9/00 ,  H01L27/32

Abstract: A display panel includes an array substrate, a protective cover, a fingerprint identification circuit, and an optical structure. The array substrate and the protective cover are disposed oppositely, where the protective cover is located at a light exiting side of the array substrate. The fingerprint identification circuit is located at a side of the array substrate facing away or toward the protective cover and is configured to receive detection light and perform a fingerprint detection according to the detection light. The optical structure is located at a side of the protective cover facing away from the array substrate and is configured to increase a reflection amount of the detection light received by the fingerprint identification circuit.

公开(公告)号：US20200212081A1

公开(公告)日：2020-07-02

申请号：US16653019

申请日：2019-10-15

Applicant: Xiamen Tianma Micro-Electronics Co.,Ltd.

Inventor： Bozhi LIU ,  Xiaoqi SHI ,  Shoujin CAI ,  Xuexin LAN ,  Guozhao CHEN

IPC: H01L27/146 ,  G06K9/00

Abstract: A diode and its fabrication method are provided. The diode includes a substrate, a buffer layer on a side of the substrate, a first film layer, a second film layer and a third film layer. The first film layer is a polycrystalline silicon film layer; the second film layer is an amorphous silicon film layer; and the third film layer is one of the polycrystalline silicon film layer and the amorphous silicon film layer. The diode at least includes a first portion, a second portion, a third portion, a first electrode, and a second electrode. The first portion is located in the first film layer; the second portion is located in the second film layer; and the third portion is located in the third film layer. The first electrode is electrically connected to the first portion, and the second electrode is electrically connected to the third portion.

公开(公告)号：US20190286271A1

公开(公告)日：2019-09-19

申请号：US16214492

申请日：2018-12-10

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Xuexin LAN ,  Bozhi LIU ,  Guozhao CHEN

IPC: G06F3/041

Abstract: The present disclosure provides a force sensor, a display panel, and a force detection method. The force sensor includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. A first resistor is connected between the first input terminal and the first output terminal. A first transistor and a second transistor are connected in parallel between the first output terminal and the second input terminal. A third transistor and a fourth transistor are connected in parallel between the second input terminal and the second output terminal. A further first resistor is connected between the second output terminal and the first input terminal. An equivalent resistance of the first transistor is equal to that of the fourth transistor, and an equivalent resistance of the second transistor is equal to that of the third transistor.

公开(公告)号：US20190011786A1

公开(公告)日：2019-01-10

申请号：US15834222

申请日：2017-12-07

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Bozhi LIU ,  Xiaoxiao WU ,  Guozhao CHEN

IPC: G02F1/1343 ,  G02F1/1335

CPC classification number: G02F1/134309 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/13439 ,  G02F2201/122 ,  G02F2201/123 ,  G02F2201/52 ,  G02F2201/56

Abstract: A special-shaped display panel having a display area and a peripheral area, including: a peripheral light-shading layer at least partially located in the peripheral area and defining the display area; and a plurality of edge pixels, each of the edge pixels comprising an aperture portion located in the display area, and a light-shading portion located in the peripheral area and covered by the peripheral light-shading layer an area of the aperture portion of each edge pixel is defined as S, a transmittance of each edge pixel is defined as T, it is further defined that M=S*T, and the M values of the edge pixels are identical. Such solution improves the edge color cast problem of special-shaped display panel, makes the color displayed at the edge of the special-shaped display panel uniform, and improves the visual effect of the edge of the display panel.

公开(公告)号：US20170131579A1

公开(公告)日：2017-05-11

申请号：US15413626

申请日：2017-01-24

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

Inventor： Binbin CHEN ,  Bozhi LIU ,  Bingping LIU

IPC: G02F1/137 ,  G02F1/133 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1362

CPC classification number: G02F1/134363 ,  G02F2001/134381

Abstract: A liquid crystal display panel and a liquid crystal display device are provided. The liquid crystal display panel comprises a first substrate, a second substrate, a liquid crystal layer sandwiched between the first and second substrate, and an auxiliary electrode. The first substrate includes a plurality of gate electrode lines and a plurality of data lines intersected to define a plurality of pixel units. Each pixel unit corresponds to a pixel electrode and a common electrode. In each region corresponding to one pixel unit, the pixel electrode and the common electrode are configured to form an electric field that drives the liquid crystal layer. A vertical projection of the auxiliary electrode on the first substrate covers an area where the electric field is formed by the pixel electrode and the common electrode, and a thickness of the liquid crystal layer is less than or equal to 3.2 μm.

公开(公告)号：US20160126258A1

公开(公告)日：2016-05-05

申请号：US14733797

申请日：2015-06-08

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd. ,  Tianma Micro-Electronics Co., Ltd.

Inventor： Bozhi LIU ,  Zaiwen ZHU

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1222 ,  H01L27/1255 ,  H01L27/1262 ,  H01L29/78633

Abstract: A low temperature poly-silicon (LTPS) array substrate is disclosed. The array substrate includes a first substrate and a stack structure on the first substrate, where the stack structure includes a first conductive layer, and a second conductive layer. The first and second conductive layers are insulated from each other. The array substrate also includes a polysilicon layer above the first and second conductive layers, an interlayer insulating layer above the polysilicon layer, and a source-drain metal layer on the interlayer insulating layer. The source-drain metal layer includes a source and a drain, the source and the drain are electrically connected with the polysilicon layer through a first via, and one of the source and the drain is electrically connected with the first conductive layer through a second via.

Abstract translation: 公开了一种低温多晶硅（LTPS）阵列衬底。 阵列基板在第一基板上包括第一基板和堆叠结构，其中堆叠结构包括第一导电层和第二导电层。 第一和第二导电层彼此绝缘。 阵列基板还包括在第一和第二导电层上方的多晶硅层，多晶硅层上方的层间绝缘层和层间绝缘层上的源极 - 漏极金属层。 源极 - 漏极金属层包括源极和漏极，源极和漏极通过第一通孔与多晶硅层电连接，并且源极和漏极中的一个通过第二通孔与第一导电层电连接 。