Abstract:
A display panel includes a plurality of pixel units. At least one pixel unit includes a display region and an anti-peep region. The anti-peep region includes a first light-blocking layer and a second light-blocking layer. The first light-blocking layer is on a side of the second light-blocking layer facing a light-exiting surface of the display panel. Along a direction perpendicular to the light-exiting surface of the display panel, a distance between the first light-blocking layer and the second light-blocking layer is greater than zero. Along a fifth direction, the first light-blocking layer includes a plurality of first light-blocking strips and a plurality of first openings. A first opening is arranged between two neighboring first light-blocking strips. The fifth direction is parallel to the light-exiting surface of the display panel. Along the fifth direction, the second light-blocking layer includes a plurality of second light-blocking strips and a plurality of second openings.
Abstract:
A display panel and a display device are provided in the present disclosure. The display panel includes a first display region and a second display region which are adjacently arranged. A light transmittance of the first display region is greater than a light transmittance of the second display region. The display panel further includes a plurality of scan lines and a plurality of data lines extending along the second direction. One first sub-pixel row is electrically connected to at least two of the plurality of scan lines. The plurality of data lines includes first data lines, where one of the first data lines is electrically connected to the first sub-pixel column, and at least a part of the first data lines is made of a transparent conductive material. In the first display region, at least two of the first data lines are connected through a connection line.
Abstract:
A display panel and a display apparatus are provided in the present disclosure. The display panel includes a plurality of pixel units. At least one pixel unit includes a display region and an anti-peep region. The anti-peep region includes a first light-blocking layer and a second light-blocking layer; and along a direction perpendicular to the light-exiting surface of the display panel, a distance between the first light-blocking layer and the second light-blocking layer is greater than zero. The first light-blocking layer includes at least one first light-blocking strip and at least one first opening. The second light-blocking layer includes at least one second light-blocking strip and at least one second opening. A vertical projection of a first or second opening on the light-exiting surface of the display panel is within a vertical projection of a corresponding first or second light-blocking strip on the light-exiting surface of the display panel.
Abstract:
Provided are a shift register, a gate drive circuit, a display panel and a driving method. The shift register includes a first output module, a second output module, a first node, a second node, a first power supply signal terminal, a first clock signal terminal and a scan output terminal. The first output module and the second output module are electrically connected to the scan output terminal. The first output module is further electrically connected to the first power supply signal terminal and the first node. The first node is configured to control a conduction state of the first output module. The second output module is further electrically connected to the first clock signal terminal and the second node. The second node is configured to control a conduction state of the second output module. There is no capacitor in the first output module and/or the second output module.
Abstract:
A display panel and a display device are provided. The display panel includes a first display region and a second display region that are arranged adjacent to each other. The second display region is multiplexed as a photosensitive element disposure region. The first display region includes first sub-pixels, and the second display region includes second sub-pixels and third sub-pixels. The display panel also includes a first substrate and a second substrate that are oppositely disposed. The first substrate is provided with a plurality of signal lines, the plurality of signal lines at least include scan lines and data lines, and the scan lines and the data lines are isolated and crossed to define regions where the first sub-pixel, the second sub-pixel, and the third sub-pixel are located. A signal line of the plurality of signal lines in the second display region is made of a transparent conductive material.
Abstract:
A display panel and a display apparatus are provided in the present disclosure. The display panel includes a plurality of pixel units, where the pixel unit at least includes a color pixel region and a highlighted pixel region. A side of the first substrate facing the second substrate includes a first light-blocking layer, and a side of the second substrate facing the first substrate includes a second light-blocking layer and a color-resist layer. A first light-blocking portion at least includes a first opening and a first sub-portion; and a second light-blocking portion at least includes a second sub-portion and a second opening. An orthographic projection of the second opening onto the first substrate overlaps an orthographic projection of the first sub-portion onto the first substrate; and an orthographic projection of the first opening onto the first substrate overlaps an orthographic projection of the second sub-portion onto the first substrate.
Abstract:
A display panel has a display region including a first display region and a second display region. In an embodiment, the display panel includes sub-pixels located in the display region, an array substrate and the color filter substrate that are opposite to each other, and liquid crystal molecules located between the array substrate and the color filter substrate. In an embodiment, the sub-pixels include first sub-pixels located in the first display region and second sub-pixels located in the second display region. In an embodiment, in the second display region, some of the second sub-pixels are first-type sub-pixels. In an embodiment, the first-type sub-pixel includes a first electrode and a second electrode. In an embodiment, in a first or second direction, orthographic projections of the first electrode and the second electrode at least partially overlap, the first direction intersects the second direction intersect, and the first direction and the second direction are parallel to a plane of the display panel.
Abstract:
An array substrate, and a display panel and display device including the same are disclosed. An embodiment of the array substrate comprises a display region and a non-display region. The non-display region comprises: abase substrate; and a first metal layer, a second metal layer, and a third metal layer arranged in a direction perpendicular to the base substrate. A transistor and a metal line are arranged in the non-display region. A gate electrode of the transistor is located in the first metal layer. A source electrode and a drain electrode of the transistor are located in the second metal layer. The metal line is located in the third metal layer. The orthographic projection of the transistor onto the base substrate overlaps, at least partially, with the orthographic projection of the metal line onto the base substrate.
Abstract:
The present invention discloses a TFT array substrate and a manufacturing method thereof and a liquid crystal display device, which is aiming at lowering the resistance value of a common electrode and not diminishing the aperture ratio of pixels on the premise that the manufacturing cost is not additionally increased. The TFT array substrate includes: a substrate, a common electrode layer arranged on the substrate, a first insulating layer arranged on the common electrode layer and a plurality of pixel electrodes arranged in an array on the first insulating layer, wherein via holes penetrating through the first insulating layer are formed between adjacent pixels in some of a plurality of pixels, and common electrode lines are grown between rows and/or columns of pixels in some of the plurality of pixels, and in parallel with the common electrode layer below the first insulating layer through the via holes.
Abstract:
A display module and a display apparatus are provided in the present disclosure. The display module includes a backlight assembly and a display anti-peep assembly. The display anti-peep assembly is on a light-exiting side of the backlight assembly; and the display anti-peep assembly includes a display assembly and an anti-peep assembly; and the anti-peep assembly at least includes a plurality of light-blocking parts which is arranged along a direction in parallel with a plane where the display module is located. The display module further includes a first display mode and a second display mode. In the first display mode, the anti-peep assembly is in an operating state, and a light-exiting angle of the anti-peep assembly is α1; and in the second display mode, the anti-peep assembly is not in an operating state, and the light-exiting angle of the display anti-peep assembly is α2, where α1