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    Memory with high dielectric constant antifuses adapted for use at low voltage
    1.
    发明授权
    Memory with high dielectric constant antifuses adapted for use at low voltage 有权
    具有适用于低电压使用的高介电常数反熔丝的存储器

    公开(公告)号：US07781805B2

    公开(公告)日：2010-08-24

    申请号：US12367214

    申请日：2009-02-06

    申请人： Xiaoyu Yang ,  Roy E. Scheurelein ,  Feng Li ,  Albert T. Meeks

    发明人： Xiaoyu Yang ,  Roy E. Scheurelein ,  Feng Li ,  Albert T. Meeks

    IPC分类号： H01L29/66

    CPC分类号： H01L45/12 ,  G11C17/00 ,  G11C17/16 ,  H01L23/5252 ,  H01L27/101 ,  H01L45/04 ,  H01L45/146 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A memory array having memory cells comprising a diode and an antifuse can be made smaller and programmed at lower voltage by using an antifuse material having a higher dielectric constant and a higher acceleration factor than those of silicon dioxide, and by using a diode having a lower band gap than that of silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example, hafnium silicon oxynitride or hafnium silicon oxide, are particularly effective. Diode materials with band gaps lower than that of silicon, such as germanium or a silicon-germanium alloy, are particularly effective.

    摘要翻译： 通过使用具有比二氧化硅更高的介电常数和更高的加速因子的反熔丝材料，并且通过使用具有较低的二极管的二极管，可以使具有包括二极管和反熔丝的存储单元的存储器阵列更小并以较低的电压编程 带隙比硅。 这样的存储器阵列可以通过使用高加速因子和较低带隙材料而具有长的工作寿命。 具有介于5和27之间的介电常数的防腐材料，例如铪硅氮氧化物或氧化铪铪是特别有效的。 带隙低于硅的二极管材料如锗或硅 - 锗合金是特别有效的。

    METHODS INVOLVING MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE
    2.
    发明申请
    METHODS INVOLVING MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE 有权
    涉及适用于低电压使用的高介电常数抗体的记忆体的方法

    公开(公告)号：US20090141535A1

    公开(公告)日：2009-06-04

    申请号：US12367258

    申请日：2009-02-06

    申请人： Xiaoyu Yang ,  Roy E. Scheuerlein ,  Feng Li ,  Albert T. Meeks

    发明人： Xiaoyu Yang ,  Roy E. Scheuerlein ,  Feng Li ,  Albert T. Meeks

    IPC分类号： G11C17/16 ,  G11C17/00 ,  G11C17/06 ,  G11C7/00 ,  H01L21/00

    CPC分类号： H01L45/12 ,  G11C17/00 ,  G11C17/16 ,  H01L23/5252 ,  H01L27/101 ,  H01L45/04 ,  H01L45/146 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods involve using a memory array having memory cells comprising a diode and an antifuse, in which the antifuse is made smaller and programmed at lower voltage by using an antifuse material having a higher dielectric constant and a higher acceleration factor than those of silicon dioxide, and in which the diode is made of a material having a lower band gap than that of silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example, hafnium silicon oxynitride or hafnium silicon oxide, are particularly effective. Diode materials with band gaps lower than that of silicon, such as germanium or a silicon-germanium alloy, are particularly effective.

    摘要翻译： 方法包括使用具有包含二极管和反熔丝的存储单元的存储器阵列，其中通过使用具有比二氧化硅更高的介电常数和更高的加速因子的反熔丝，其中反熔丝被制成较小的并以较低的电压编程，以及 其中二极管由具有比硅的带隙低的带隙的材料制成。 这样的存储器阵列可以通过使用高加速因子和较低带隙材料而具有长的工作寿命。 具有介于5和27之间的介电常数的防腐材料，例如铪硅氮氧化物或氧化铪铪是特别有效的。 带隙低于硅的二极管材料如锗或硅 - 锗合金是特别有效的。

    Methods involving memory with high dielectric constant antifuses adapted for use at low voltage
    3.
    发明授权
    Methods involving memory with high dielectric constant antifuses adapted for use at low voltage 有权
    涉及具有适合在低电压下使用的高介电常数反熔丝的存储器的方法

    公开(公告)号：US08314023B2

    公开(公告)日：2012-11-20

    申请号：US12367258

    申请日：2009-02-06

    申请人： Xiaoyu Yang ,  Roy E. Scheuerlein ,  Feng Li ,  Albert T. Meeks

    发明人： Xiaoyu Yang ,  Roy E. Scheuerlein ,  Feng Li ,  Albert T. Meeks

    IPC分类号： H01L21/44

    CPC分类号： H01L45/12 ,  G11C17/00 ,  G11C17/16 ,  H01L23/5252 ,  H01L27/101 ,  H01L45/04 ,  H01L45/146 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Methods involve using a memory array having memory cells comprising a diode and an antifuse, in which the antifuse is made smaller and programmed at lower voltage by using an antifuse material having a higher dielectric constant and a higher acceleration factor than those of silicon dioxide, and in which the diode is made of a material having a lower band gap than that of silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example, hafnium silicon oxynitride or hafnium silicon oxide, are particularly effective. Diode materials with band gaps lower than that of silicon, such as germanium or a silicon-germanium alloy, are particularly effective.

    摘要翻译： 方法包括使用具有包含二极管和反熔丝的存储单元的存储器阵列，其中通过使用具有比二氧化硅更高的介电常数和更高的加速因子的反熔丝，其中反熔丝被制成较小的并以较低的电压编程，以及 其中二极管由具有比硅的带隙低的带隙的材料制成。 这样的存储器阵列可以通过使用高加速因子和较低带隙材料而具有长的工作寿命。 具有介于5和27之间的介电常数的防腐材料，例如铪硅氮氧化物或氧化铪铪是特别有效的。 带隙低于硅的二极管材料如锗或硅 - 锗合金是特别有效的。

    MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE
    6.
    发明申请
    MEMORY WITH HIGH DIELECTRIC CONSTANT ANTIFUSES ADAPTED FOR USE AT LOW VOLTAGE 有权
    具有适用于低电压使用的高介电常数抗体的存储器

    公开(公告)号：US20090140299A1

    公开(公告)日：2009-06-04

    申请号：US12367214

    申请日：2009-02-06

    申请人： Xiaoyu Yang ,  Roy E. Scheuerlein ,  Feng Li ,  Albert T. Meeks

    发明人： Xiaoyu Yang ,  Roy E. Scheuerlein ,  Feng Li ,  Albert T. Meeks

    IPC分类号： H01L29/66 ,  H01L23/525

    CPC分类号： H01L45/12 ,  G11C17/00 ,  G11C17/16 ,  H01L23/5252 ,  H01L27/101 ,  H01L45/04 ,  H01L45/146 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A memory array having memory cells comprising a diode and an antifuse can be made smaller and programmed at lower voltage by using an antifuse material having a higher dielectric constant and a higher acceleration factor than those of silicon dioxide, and by using a diode having a lower band gap than that of silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example, hafnium silicon oxynitride or hafnium silicon oxide, are particularly effective. Diode materials with band gaps lower than that of silicon, such as germanium or a silicon-germanium alloy, are particularly effective.

    摘要翻译： 通过使用具有比二氧化硅更高的介电常数和更高的加速因子的反熔丝材料，并且通过使用具有较低的二极管的二极管，可以使具有包括二极管和反熔丝的存储单元的存储器阵列更小并以较低的电压编程 带隙比硅。 这样的存储器阵列可以通过使用高加速因子和较低带隙材料而具有长的工作寿命。 具有介于5和27之间的介电常数的防腐材料，例如铪硅氮氧化物或氧化铪铪是特别有效的。 带隙低于硅的二极管材料如锗或硅 - 锗合金是特别有效的。

    Method and apparatus for programming a memory array
    7.
    发明授权
    Method and apparatus for programming a memory array 有权
    用于编程存储器阵列的方法和装置

    公开(公告)号：US07212454B2

    公开(公告)日：2007-05-01

    申请号：US11158396

    申请日：2005-06-22

    申请人： Bendik Kleveland ,  Tae Hee Lee ,  Seung Geon Yu ,  Chia Yang ,  Feng Li ,  Xiaoyu Yang

    发明人： Bendik Kleveland ,  Tae Hee Lee ,  Seung Geon Yu ,  Chia Yang ,  Feng Li ,  Xiaoyu Yang

    IPC分类号： G11C29/00

    CPC分类号： G11C29/816 ,  G11C17/14

    摘要： A method and apparatus for programming a memory array are disclosed. In one embodiment, after each word line is programmed, an attempt is made to detect a defect on that word line. If a defect is detected, the word line is repaired with a redundant word line. The word lines are then reprogrammed and rechecked for defects. In another embodiment, after each word line is programmed, an attempt is made to detect a defect on that word line. If a defect is detected, that word line is repaired along with a previously-programmed adjacent word line. In yet another embodiment, after each word line is programmed, an attempt is made to detect a defect on that word line and a previously-programmed adjacent word line. If a defect is detected on that word line, that word line and the previously-programmed adjacent word line are repaired with redundant word lines.

    摘要翻译： 公开了一种用于对存储器阵列进行编程的方法和装置。 在一个实施例中，在每个字线被编程之后，尝试检测该字线上的缺陷。 如果检测到缺陷，则用冗余字线修复字线。 字线然后被重新编程并重新检查缺陷。 在另一个实施例中，在每个字线被编程之后，尝试检测该字线上的缺陷。 如果检测到缺陷，则该字线与预先编程的相邻字线一起被修复。 在另一个实施例中，在每个字线被编程之后，尝试检测该字线上的缺陷和预先编程的相邻字线。 如果在该字线上检测到缺陷，则该字线和先前编程的相邻字线用冗余字线修复。

    Memory with high dielectric constant antifuses and method for using at low voltage
    8.
    发明申请
    Memory with high dielectric constant antifuses and method for using at low voltage 审中-公开
    高介电常数反熔丝的存储器和低电压使用的方法

    公开(公告)号：US20070069241A1

    公开(公告)日：2007-03-29

    申请号：US11173973

    申请日：2005-07-01

    申请人： Xiaoyu Yang ,  Roy Scheuerlein ,  Feng Li ,  Albert Meeks

    发明人： Xiaoyu Yang ,  Roy Scheuerlein ,  Feng Li ,  Albert Meeks

    IPC分类号： H01L27/10 ,  H01L21/82

    CPC分类号： H01L45/12 ,  G11C17/00 ,  G11C17/16 ,  H01L23/5252 ,  H01L27/101 ,  H01L45/04 ,  H01L45/146 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A memory array having memory cells comprising a diode and an antifuse can be made smaller and programmed at lower voltage by using antifuse materials having higher dielectric constant and higher acceleration factor than silicon dioxide, and by using diodes having lower band gaps than silicon. Such memory arrays can be made to have long operating lifetimes by using the high acceleration factor and lower band gap materials. Antifuse materials having dielectric constants between 5 and 27, for example hafnium silicon oxynitride or hafnium silicon oxide are particularly effective. Diode materials with band gaps lower than silicon, such as germanium or a silicon-germanium alloy are particularly effective.

    摘要翻译： 通过使用具有比二氧化硅更高的介电常数和更高的加速因子的反熔丝材料，并且通过使用具有比硅更低的带隙的二极管，可以使具有包括二极管和反熔丝的存储单元的存储器阵列更小并且在较低的电压下编程。 这样的存储器阵列可以通过使用高加速因子和较低带隙材料而具有长的工作寿命。 具有介于5和27之间的介电常数的防腐材料，例如铪硅氮氧化物或氧化铪铪是特别有效的。 带隙低于硅的二极管材料，例如锗或硅 - 锗合金是特别有效的。

    Method and apparatus for programming a memory array
    9.
    发明申请
    Method and apparatus for programming a memory array 有权
    用于编程存储器阵列的方法和装置

    公开(公告)号：US20060291303A1

    公开(公告)日：2006-12-28

    申请号：US11158396

    申请日：2005-06-22

    申请人： Bendik Kleveland ,  Tae Lee ,  Seung Yu ,  Chia Yang ,  Feng Li ,  Xiaoyu Yang

    发明人： Bendik Kleveland ,  Tae Lee ,  Seung Yu ,  Chia Yang ,  Feng Li ,  Xiaoyu Yang

    IPC分类号： G11C29/00

    CPC分类号： G11C29/816 ,  G11C17/14

    摘要： A method and apparatus for programming a memory array are disclosed. In one embodiment, after each word line is programmed, an attempt is made to detect a defect on that word line. If a defect is detected, the word line is repaired with a redundant word line. The word lines are then reprogrammed and rechecked for defects. In another embodiment, after each word line is programmed, an attempt is made to detect a defect on that word line. If a defect is detected, that word line is repaired along with a previously-programmed adjacent word line. In yet another embodiment, after each word line is programmed, an attempt is made to detect a defect on that word line and a previously-programmed adjacent word line. If a defect is detected on that word line, that word line and the previously-programmed adjacent word line are repaired with redundant word lines.

    摘要翻译： 公开了一种用于对存储器阵列进行编程的方法和装置。 在一个实施例中，在每个字线被编程之后，尝试检测该字线上的缺陷。 如果检测到缺陷，则用冗余字线修复字线。 字线然后被重新编程并重新检查缺陷。 在另一个实施例中，在每个字线被编程之后，尝试检测该字线上的缺陷。 如果检测到缺陷，则该字线与预先编程的相邻字线一起被修复。 在另一个实施例中，在每个字线被编程之后，尝试检测该字线上的缺陷和预先编程的相邻字线。 如果在该字线上检测到缺陷，则该字线和先前编程的相邻字线用冗余字线修复。

    Bolt locking structure for waterproof LED lamp
    10.
    发明授权
    Bolt locking structure for waterproof LED lamp 有权

    公开(公告)号：US10337700B2

    公开(公告)日：2019-07-02

    申请号：US15310791

    申请日：2015-09-17

    申请人： Feng Li

    发明人： Feng Li

    IPC分类号： F21V15/01 ,  F21V31/00 ,  F21V17/10 ,  F21Y115/10

    摘要： A bolt locking structure for a waterproof LED lamp contains: a first casing and a second casing. The first casing includes multiple first protrusions and multiple first recesses which are arranged on each of four peripheral walls thereof respectively. The second casing includes multiple second protrusions and multiple second recesses which are arranged on each of four peripheral walls thereof respectively. The multiple first protrusions retain with the multiple second recesses, and the multiple first recesses retain with the multiple second protrusions. Multiple through holes are coaxial and form on each peripheral wall of each of the first casing and the second casing respectively, wherein each of the multiple through holes passes through each of the multiple first protrusions and the multiple second protrusions, such that each of multiple connection bolts inserts into the multiple through holes, thus locking the first casing and the second casing together.