公开(公告)号：US20190026416A1

公开(公告)日：2019-01-24

申请号：US15658086

申请日：2017-07-24

Applicant: Xilinx, Inc.

Inventor： Akhilesh Mahajan ,  Bokka Abhiram Sai Krishna ,  Keshava Gopal Goud Cheruku

IPC: G06F17/50

CPC classification number: G06F17/5031 ,  G01R31/3177 ,  G06F11/25

Abstract: Monitoring signals in an integrated circuit can include monitoring a probed signal of an integrated circuit using a logic analyzer circuit implemented within the integrated circuit, detecting state changes in the probed signal using the logic analyzer circuit, and generating, within the logic analyzer circuit, a file specifying time stamped state changes of the probed signal.

公开(公告)号：US20170097910A1

公开(公告)日：2017-04-06

申请号：US14876467

申请日：2015-10-06

Applicant: Xilinx, Inc.

Inventor： Anil Kumar A V ,  Bokka Abhiram Sai Krishna

IPC: G06F13/28 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F13/28 ,  G06F13/404 ,  G06F13/4282

Abstract: Using a storage interface circuit of a programmable IC, a first set of configuration data can be communicated between a storage circuit and the programmable IC. Using the first set of configuration data, the programmable IC can be programmed to include: a bus interface module that is designed to interface with a host device over a communication bus that links multiple devices, and an internal configuration access interface that is designed to interface between the bus interface module and programmable logic of the programmable IC. Using direct memory access (DMA) transfers through the bus interface module, a second set of configuration data can be communicated between a memory circuit and the programmable IC. Using the second set of configuration data, the programmable logic of the programmable IC can be programmed.

公开(公告)号：US09864605B2

公开(公告)日：2018-01-09

申请号：US14931037

申请日：2015-11-03

Applicant: Xilinx, Inc.

Inventor： Mrinal J. Sarmah ,  Bokka Abhiram Sai Krishna ,  Anil Kumar A V

IPC: G06F9/00 ,  G06F15/177 ,  G06F9/44 ,  G06F13/40 ,  G06F13/42

CPC classification number: G06F9/4408 ,  G06F13/4068 ,  G06F13/4282

Abstract: An integrated circuit (IC) that includes a processor circuit can be booted by receiving, using a storage interface circuit of the IC, a first boot image from a nonvolatile memory chip. The first boot image is executed on a processor circuit of the IC to configure a bus interface module that is designed to communicate with a host device over a communication bus that links multiple devices and the IC. Using the bus interface module, a second boot image is received from the memory of the host device to a memory of the IC. The IC is booted by executing the second boot image.

公开(公告)号：US20170123815A1

公开(公告)日：2017-05-04

申请号：US14931037

申请日：2015-11-03

Applicant: Xilinx, Inc.

Inventor： Mrinal J. Sarmah ,  Bokka Abhiram Sai Krishna ,  Anil Kumar A V

IPC: G06F9/44 ,  G06F13/42 ,  G06F13/40

CPC classification number: G06F9/4408 ,  G06F13/4068 ,  G06F13/4282

Abstract: An integrated circuit (IC) that includes a processor circuit can be booted by receiving, using a storage interface circuit of the IC, a first boot image from a nonvolatile memory chip. The first boot image is executed on a processor circuit of the IC to configure a bus interface module that is designed to communicate with a host device over a communication bus that links multiple devices and the IC. Using the bus interface module, a second boot image is received from the memory of the host device to a memory of the IC. The IC is booted by executing the second boot image.

公开(公告)号：US10482205B2

公开(公告)日：2019-11-19

申请号：US15658086

申请日：2017-07-24

Applicant: Xilinx, Inc.

Inventor： Akhilesh Mahajan ,  Bokka Abhiram Sai Krishna ,  Keshava Gopal Goud Cheruku

IPC: G06F17/50 ,  G01R31/3177 ,  G06F11/25

Abstract: Monitoring signals in an integrated circuit can include monitoring a probed signal of an integrated circuit using a logic analyzer circuit implemented within the integrated circuit, detecting state changes in the probed signal using the logic analyzer circuit, and generating, within the logic analyzer circuit, a file specifying time stamped state changes of the probed signal.

公开(公告)号：US09934175B2

公开(公告)日：2018-04-03

申请号：US14876467

申请日：2015-10-06

Applicant: Xilinx, Inc.

Inventor： Anil Kumar A V ,  Bokka Abhiram Sai Krishna

IPC: G06F13/00 ,  G06F13/28 ,  G06F13/42 ,  G06F13/40

CPC classification number: G06F13/28 ,  G06F13/404 ,  G06F13/4282

Abstract: Using a storage interface circuit of a programmable IC, a first set of configuration data can be communicated between a storage circuit and the programmable IC. Using the first set of configuration data, the programmable IC can be programmed to include: a bus interface module that is designed to interface with a host device over a communication bus that links multiple devices, and an internal configuration access interface that is designed to interface between the bus interface module and programmable logic of the programmable IC. Using direct memory access (DMA) transfers through the bus interface module, a second set of configuration data can be communicated between a memory circuit and the programmable IC. Using the second set of configuration data, the programmable logic of the programmable IC can be programmed.