公开(公告)号：US08839166B1

公开(公告)日：2014-09-16

申请号：US13837234

申请日：2013-03-15

Applicant: Xilinx, Inc.

Inventor： Sudipto Chakraborty ,  David A. Knol ,  Stephen P. Rozum ,  Ryan A. Linderman ,  Derrick S. Woods

IPC: G06F17/50

CPC classification number: G06F17/5054 ,  G06F17/505 ,  G06F2217/66

Abstract: A method, non-transitory computer readable medium and apparatus for using an out-of-context sub-block in a hierarchical design flow for an integrated circuit are disclosed. For example, the method identifies one or more sub-blocks in the hierarchical design flow that are eligible for creating the out-of-context sub-block, receives a selection of one of the one or more sub-blocks that are eligible and creates the out-of-context sub-block for the one of the one or more sub-blocks that is selected.

Abstract translation: 公开了一种用于在集成电路的分层设计流程中使用失去上下文子块的方法，非暂时计算机可读介质和装置。 例如，该方法识别分层设计流程中的一个或多个子块，该子块有资格创建失去上下文的子块，接收一个或多个符合条件并创建的子块中的一个的选择 用于所选择的一个或多个子块中的一个的上下文子块。

公开(公告)号：US10303385B1

公开(公告)日：2019-05-28

申请号：US15451967

申请日：2017-03-07

Applicant: Xilinx, Inc.

Inventor： Michael Keilson ,  Stephen P. Rozum ,  Ryan A. Linderman ,  Pradip Kar

IPC: G06F3/06 ,  G06F17/50 ,  G11C8/16

Abstract: Modifying initialization data for a memory array of a circuit design can include providing, using a processor, portions of an incoming stream of data for initializing the memory array to emulation objects of a memory array emulator. The memory array emulator is configured to emulate an implementation of the memory array and the emulation objects represent block random access memories (block RAMs) of the memory array. Using the processor, the data can be formatted using the emulation objects to generate initialization data, wherein the data is formatted based upon configuration settings of the block RAMs emulated by the respective emulation objects. A configuration bitstream can be updated, using the processor, with the initialization data.