公开(公告)号：US11176296B1

公开(公告)日：2021-11-16

申请号：US17007177

申请日：2020-08-31

Applicant: Xilinx, Inc.

Inventor： Pradip Jha ,  Brendan Matthew O'Higgins ,  Dinesh K. Monga ,  Bart Reynolds ,  Ryan Linderman

IPC: G06F30/30 ,  G06F30/327 ,  G06F30/33 ,  G06F9/451 ,  G06F15/78 ,  G06F30/39

Abstract: A unified data model for creating a circuit design for a heterogeneous integrated circuit is provided. The unified data model is stored as a data structure in computer hardware. The unified data model includes a unified netlist specifying the circuit design and a unified device model representing the heterogeneous integrated circuit. The unified netlist includes netlist objects configured to communicate over bitwise connections and network connections representing packet-based communications. The unified netlist may be mapped to the unified device model using computer hardware. Using the computer hardware, at least a portion of the device model may be displayed in coordination with at least a portion of the unified netlist mapped thereto.