公开(公告)号：US10853541B1

公开(公告)日：2020-12-01

申请号：US16399661

申请日：2019-04-30

Applicant: Xilinx, Inc.

Inventor： Abhishek Joshi ,  Grigor S. Gasparyan ,  Aditya Chaubal ,  Sridhar Kirshnamurthy ,  Xiao Dong

IPC: G06F30/327 ,  G06F30/331 ,  G06F30/34 ,  G06F13/40 ,  G06F15/78

Abstract: Some examples described herein relate to global mapping of program nodes of a netlist of an application. In an example, a design system includes a processor and a memory coupled to the processor. The memory stores instruction code. The processor is configured to execute the instruction code to obtain a netlist of an application. The netlist contains program nodes and respective edges between the program nodes. The application is to be implemented on a device comprising an array of data processing engines. The processor is also configured to execute the instruction code to generate a global mapping of the program nodes based on a representation of the array of data processing engines and using an integer linear programming (ILP) algorithm; generate a detailed mapping of the program nodes based on the global mapping; and translate the detailed mapping to a file.