公开(公告)号：US09007096B1

公开(公告)日：2015-04-14

申请号：US14324858

申请日：2014-07-07

Applicant: Xilinx, Inc.

Inventor： Declan Carey ,  Thomas Mallard ,  Mark Smyth ,  James Hudner

IPC: H03K5/22 ,  G01R17/02

CPC classification number: H03K5/2481 ,  H03F3/45197 ,  H03F2200/78 ,  H03F2203/45674

Abstract: An apparatus relating generally to voltage conversion includes an amplifier coupled to receive an input voltage and a reference voltage. First and second converters are coupled to the amplifier to receive a bias voltage. The first converter includes a first transconductor coupled to receive the bias voltage to adjust a first tail current, and a first differential input. A first inverter of the first converter has a first feedback device coupled input-to-output to provide a first transimpedance amplifier load. The first inverter is coupled to the first transconductor. The second converter includes a second transconductor coupled to receive the bias voltage to adjust a second tail current, and a second differential input. A second inverter of the second converter has a second feedback device coupled input-to-output to provide a second transimpedance amplifier load. The second inverter is coupled to the second transconductor.

Abstract translation: 一般涉及电压转换的装置包括耦合以接收输入电压和参考电压的放大器。 第一和第二转换器耦合到放大器以接收偏置电压。 第一转换器包括耦合以接收偏置电压以调整第一尾电流的第一跨导器和第一差分输入。 第一转换器的第一反相器具有耦合输入到输出的第一反馈器件，以提供第一跨阻抗放大器负载。 第一反相器耦合到第一跨导器。 第二转换器包括耦合以接收偏置电压以调整第二尾电流的第二跨导器和第二差分输入。 第二转换器的第二反相器具有耦合输入到输出以提供第二跨阻放大器负载的第二反馈装置。 第二反相器耦合到第二跨导器。

公开(公告)号：US09209809B1

公开(公告)日：2015-12-08

申请号：US14573815

申请日：2014-12-17

Applicant: Xilinx, Inc.

Inventor： Kevin Geary ,  Ronan Casey ,  Declan Carey ,  Thomas Mallard

IPC: H03K19/094 ,  H03K19/0185 ,  H03K19/003

CPC classification number: H03K19/018514 ,  H03K19/00384

Abstract: A circuit for controlling output swing in a current-mode logic circuit is described. The circuit comprises a plurality of current-mode logic circuits coupled in series; a first current-mode logic circuit of the plurality of current-mode logic circuits coupled to provide a signal to a second current-mode logic circuit of the plurality of current-mode logic circuits; an amplitude detector coupled to detect an amplitude of the signal received at the second current-mode logic circuit; and a control circuit coupled to the amplitude detector; wherein the control circuit generates an amplitude control signal for a current-mode logic circuit of the plurality of current-mode logic circuits based upon a detected amplitude of the signal received at the second current-mode logic circuit. A method of controlling output swing in a current-mode logic circuit is also disclosed.

Abstract translation: 描述用于控制电流模式逻辑电路中的输出摆幅的电路。 电路包括串联耦合的多个电流模式逻辑电路; 所述多个电流模式逻辑电路中的第一电流模式逻辑电路被耦合以向所述多个电流模式逻辑电路中的第二电流模式逻辑电路提供信号; 振幅检测器，被耦合以检测在第二电流模式逻辑电路处接收的信号的幅度; 以及耦合到所述幅度检测器的控制电路; 其中所述控制电路基于在所述第二电流模式逻辑电路处接收的所述信号的检测幅度，生成所述多个电流模式逻辑电路中的电流模式逻辑电路的幅度控制信号。 还公开了一种控制电流模式逻辑电路中的输出摆幅的方法。