公开(公告)号：US11942904B2

公开(公告)日：2024-03-26

申请号：US17402892

申请日：2021-08-16

Applicant: Xilinx, Inc.

Inventor： Hongzhi Zhao ,  Xing Zhao ,  Vincent C. Barnes ,  Xiaohan Chen ,  Hemang M. Parekh

IPC: H03F1/32 ,  H03F3/21 ,  H03G1/00

CPC classification number: H03F1/3247 ,  H03F3/21 ,  H03G1/0005 ,  H03F2201/3227

Abstract: A digital predistortion (DPD) system includes an input configured to receive an input signal. In some examples, a first signal path configured to generate a first signal based on the input signal. In some examples, an error model provider configured to generate an error model signal modeled after a gate bias error voltage associated with the DPD system. In some examples, a first combiner configured to combine the first signal and the error model signal to generate a first intermediate signal, and the DPD system generates an output signal based at least on the first intermediate signal.

公开(公告)号：US09338039B1

公开(公告)日：2016-05-10

申请号：US14836541

申请日：2015-08-26

Applicant: Xilinx, Inc.

Inventor： Vincent C. Barnes

IPC: H04L25/49 ,  H04L25/08 ,  H03F3/21 ,  H04L27/36 ,  H03F1/32

CPC classification number: H03F1/3247 ,  H03F1/3241 ,  H03F3/24 ,  H04L25/03343 ,  H04L27/367

Abstract: In an example, an apparatus for signal classification in a digital pre-distortion (DPD) system includes a positive frequency path including a first half-band low pass filter (LPF) operable to filter samples of an input digital samples after positive frequency translation; a negative frequency path including a second half-band LPF operable to filter the samples of the input digital samples after negative frequency translation; a power estimation circuit coupled to the positive frequency path and the negative frequency path, the power estimation circuit operable to determine a first average power based on output of the first half-band LPF, a second average power based on output of the second half-band LPF, and a total average power of the input digital samples; and a controller operable to determine a frequency content metric from the first average power and the second average power, and to select a set of filter coefficients for the DPD system based on the frequency content metric and the total average power.

Abstract translation: 在一个示例中，用于在数字预失真（DPD）系统中信号分类的装置包括一个正频率路径，它包括一个第一半频带低通滤波器（LPF），该第一半频带低通滤波器可以在正频率转换之后滤波输入数字样本的样本; 负频率路径，包括可在负频率平移之后滤波输入数字样本的样本的第二半频带LPF; 功率估计电路，其耦合到所述正频率路径和所述负频率路径，所述功率估计电路可操作以基于所述第一半频带LPF的输出来确定第一平均功率;基于所述第二半频带LPF的输出的第二平均功率， 频带LPF和输入数字样本的总平均功率; 以及控制器，其可操作以根据所述第一平均功率和所述第二平均功率确定频率内容度量，并且基于所述频率内容度量和所述总平均功率来选择所述DPD系统的一组滤波器系数。

公开(公告)号：US11251819B1

公开(公告)日：2022-02-15

申请号：US17133505

申请日：2020-12-23

Applicant: XILINX, INC.

Inventor： Hongzhi Zhao ,  Xiaohan Chen ,  Hemang Parekh ,  Vincent C. Barnes

IPC: H04B1/04

Abstract: A transmitter for a communication system comprises a digital pre-distortion (DPD) circuit configured to generate a digital intermediate signal by compensating an input signal for distortions resulting from an amplifier, and an adaptation circuitry configured to update the first parameter based on the adjustment signal, the input signal, and an output signal output by the amplifier and based on the digital intermediate signal. The DPD circuit includes an infinite impulse response filter configured to implement a transfer function based on a first parameter, and thermal tracking circuitry configured to generate an adjustment signal corresponding to a thermal change of the amplifier.

公开(公告)号：US20230046588A1

公开(公告)日：2023-02-16

申请号：US17402892

申请日：2021-08-16

Applicant: Xilinx, Inc.

Inventor： Hongzhi Zhao ,  Xing Zhao ,  Vincent C. Barnes ,  Xiaohan Chen ,  Hemang M. Parekh

IPC: H03F1/32 ,  H03G1/00 ,  H03F3/21

Abstract: A digital predistortion (DPD) system includes an input configured to receive an input signal. In some examples, a first signal path configured to generate a first signal based on the input signal. In some examples, an error model provider configured to generate an error model signal modeled after a gate bias error voltage associated with the DPD system. In some examples, a first combiner configured to combine the first signal and the error model signal to generate a first intermediate signal, and the DPD system generates an output signal based at least on the first intermediate signal.

公开(公告)号：US11563453B1

公开(公告)日：2023-01-24

申请号：US17239395

申请日：2021-04-23

Applicant: XILINX, INC.

Inventor： Hongzhi Zhao ,  Vincent C. Barnes ,  Xiaohan Chen ,  Hemang M. Parekh

IPC: H04B1/04 ,  H03F1/32

Abstract: A transmitter for a communication system comprises a digital pre-distortion (DPD) circuit and adaptation circuitry. The DPD circuit is configured to generate a digital intermediate signal by compensating an input signal for distortions resulting from an amplifier. The amplifier is configured to output an output signal based on the digital intermediate signal. The DPD circuit includes one or more an infinite impulse response (IIR) filters configured to implement a first transfer function based on a first parameter, and a second transfer function based on the first parameter and a time constant. The DPD circuit is configured to generate an adjustment signal based on the first transfer function and the second transfer function. The adaptation circuitry is configured to update the first parameter based on the adjustment signal, the input signal, and the output signal.

公开(公告)号：US09455760B1

公开(公告)日：2016-09-27

申请号：US14791096

申请日：2015-07-02

Applicant: Xilinx, Inc.

Inventor： Christopher H. Dick ,  Hemang M. Parekh ,  Hongzhi Zhao ,  Vincent C. Barnes

IPC: H04B1/04 ,  H04B1/62

CPC classification number: H04B1/62 ,  H03F1/3247 ,  H03F3/245 ,  H03F2201/3233 ,  H04B1/0475 ,  H04B2001/0425 ,  H04L25/03343 ,  H04L27/368

Abstract: Apparatus, method therefor, generally related to signal preconditioning. In such an apparatus, a signal classifier block and a delay block are commonly coupled for receiving an input signal. The delay block is for providing a delayed version of the input signal. The signal classifier block is for classifying the input signal and generating a configuration signal having configuration information for digital predistortion (“DPD”) engine parameterization in response to the input signal classification. A DPD engine is for receiving the delayed version of the input signal and the configuration signal and for providing a predistorted output signal.

Abstract translation: 装置及其方法一般与信号预处理有关。 在这种装置中，信号分类器块和延迟块通常被耦合用于接收输入信号。 延迟块用于提供输入信号的延迟版本。 信号分类器块用于对输入信号进行分类，并产生具有响应于输入信号分类的用于数字预失真（“DPD”）引擎参数化的配置信息的配置信号。 DPD引擎用于接收输入信号和配置信号的延迟版本并提供预失真的输出信号。