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1.
公开(公告)号:US11942904B2
公开(公告)日:2024-03-26
申请号:US17402892
申请日:2021-08-16
Applicant: Xilinx, Inc.
Inventor: Hongzhi Zhao , Xing Zhao , Vincent C. Barnes , Xiaohan Chen , Hemang M. Parekh
CPC classification number: H03F1/3247 , H03F3/21 , H03G1/0005 , H03F2201/3227
Abstract: A digital predistortion (DPD) system includes an input configured to receive an input signal. In some examples, a first signal path configured to generate a first signal based on the input signal. In some examples, an error model provider configured to generate an error model signal modeled after a gate bias error voltage associated with the DPD system. In some examples, a first combiner configured to combine the first signal and the error model signal to generate a first intermediate signal, and the DPD system generates an output signal based at least on the first intermediate signal.
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公开(公告)号:US10951249B1
公开(公告)日:2021-03-16
申请号:US16830481
申请日:2020-03-26
Applicant: Xilinx, Inc.
Inventor: Hongzhi Zhao , Vince C Barnes , Xiaohan Chen , Hemang Parekh
Abstract: A transmit circuit operated with time-interpolated digital pre-distortion (DPD) coefficients to improve adjacent channel power ratio (ACPR) performance during a power mode change is provided. The transmit circuit includes a DPD circuit configured to operate with a first DPD coefficient according to a first transmit power level of a transmit power amplifier of the transmit circuit. The transmit circuit further includes a DPD coefficient management engine configured to retrieve a second DPD coefficient corresponding to the second transmit power level. The transmit circuit further includes a DPD coefficient time-interpolation engine configured to compute a set of time-interpolated DPD coefficients corresponding to a set of time instants for a transient period when the transmit power amplifier is adapted to the second DPD coefficient.
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公开(公告)号:US20200099416A1
公开(公告)日:2020-03-26
申请号:US16142295
申请日:2018-09-26
Applicant: Xilinx, Inc.
Inventor: Christopher H. Dick , Hongzhi Zhao , Hemang M. Parekh , Xiaohan Chen
Abstract: A digital predistortion (DPD) system includes an input configured to receive a DPD input signal. In some embodiments, a non-linear datapath is coupled to the input, where the non-linear datapath includes a plurality of parallel datapath elements each coupled to the input. By way of example, each of the plurality of parallel datapath elements is configured to add a different inverse non-linear component to the DPD input signal corresponding to a non-linear component of an amplifier. In various examples, a first combiner combines an output of each of the plurality of datapath elements to generate a first predistortion signal. In some embodiments, the DPD system further includes a linear datapath coupled to the input in parallel with the non-linear datapath to generate a second predistortion signal. In addition, a second combiner combines the first predistortion signal and the second predistortion signal to generate a DPD output signal.
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公开(公告)号:US09866269B1
公开(公告)日:2018-01-09
申请号:US15354858
申请日:2016-11-17
Applicant: Xilinx, Inc.
Inventor: Hongzhi Zhao , Christopher H. Dick , Hemang M. Parekh
CPC classification number: H04B1/62 , H03F1/3247 , H03F1/3252 , H03F1/3258 , H03F3/195 , H03F3/245 , H03F2201/3209 , H03F2201/3224 , H03F2201/3233 , H04L25/03847
Abstract: A digital predistortion (DPD) system includes an input configured to receive a DPD input signal. The DPD system includes a first predistortion circuit configured to provide a first signal path coupled to the input to generate a first predistortion signal. The first predistortion circuit includes a first infinite impulse response (IIR) filter. A second predistortion circuit is configured to provide a second signal path coupled to the input in parallel with the first signal path to generate a second predistortion signal. The second predistortion circuit includes a second IIR filter. A combiner circuit is configured to combine the first predistortion signal and the second predistortion signal to generate a DPD output signal.
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公开(公告)号:US11664964B2
公开(公告)日:2023-05-30
申请号:US17488112
申请日:2021-09-28
Applicant: XILINX, INC.
Inventor: Hongzhi Zhao , Christophe Erdmann
CPC classification number: H04L5/1461 , H04B1/0057 , H04B1/0067 , H04L27/2607
Abstract: Embodiments herein describe adapting a PIM model to compensate for changing PIM interference. A PIM model can include circuitry that generates a PIM compensation value that compensates for (i.e., mitigates or subtracts) PIM interference caused by transmitting two or more transmitter (TX) carriers in the same path. The disclosed adaptive scheme generates updated coefficients for the PIM model which are calculated after the RX signal has been removed from the RX channel. In this manner, as the PIM interference changes due to environmental conditions (e.g., temperature at the base station), the adaptive scheme can update the PIM model to generate a PIM compensation value that cancels the PIM interference.
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6.
公开(公告)号:US09590567B2
公开(公告)日:2017-03-07
申请号:US14790364
申请日:2015-07-02
Applicant: Xilinx, Inc.
Inventor: Hongzhi Zhao , Christopher H. Dick
CPC classification number: H03F1/3247 , H03F1/3252 , H03F1/3258 , H03F3/189 , H03F3/195 , H03F3/24 , H03F3/245 , H03F2201/3209 , H03F2201/3215 , H03F2201/3224 , H03F2201/3233 , H04B1/0475 , H04B2001/0425
Abstract: An apparatus relates generally to preconditioning an input signal. In this apparatus, a first digital predistortion module and a second digital predistortion module are for receiving the input signal for respectively providing a first predistorted signal and a second predistorted signal. A combiner is for combining the first predistorted signal and the second predistorted signal for providing an output signal. The first digital predistortion module includes a moving mean block for receiving the input signal for providing a moving mean signal. The first digital predistortion module further includes a digital predistorter for receiving the input signal and the moving mean signal for providing the first predistorted signal.
Abstract translation: 装置一般涉及预处理输入信号。 在该装置中,第一数字预失真模块和第二数字预失真模块用于接收用于分别提供第一预失真信号和第二预失真信号的输入信号。 组合器用于组合第一预失真信号和第二预失真信号以提供输出信号。 第一数字预失真模块包括移动平均块,用于接收用于提供移动平均信号的输入信号。 第一数字预失真模块还包括用于接收输入信号的数字预失真器和用于提供第一预失真信号的移动平均信号。
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公开(公告)号:US11356066B1
公开(公告)日:2022-06-07
申请号:US16903378
申请日:2020-06-17
Applicant: XILINX, INC.
Inventor: Hongzhi Zhao , Xiaohan Chen , Hemang Parekh
Abstract: Described examples provide for digital communication circuits and systems that implement digital pre-distortion (DPD). In an example, a system includes a DPD circuit configured to compensate an input signal for distortions resulting from an amplifier. The DPD circuit includes an infinite impulse response (IIR) filter configured to implement a transfer function. The IIR filter includes a selection circuit configured to selectively output a selected parameter. The transfer function is based on the selected parameter.
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公开(公告)号:US11251819B1
公开(公告)日:2022-02-15
申请号:US17133505
申请日:2020-12-23
Applicant: XILINX, INC.
Inventor: Hongzhi Zhao , Xiaohan Chen , Hemang Parekh , Vincent C. Barnes
IPC: H04B1/04
Abstract: A transmitter for a communication system comprises a digital pre-distortion (DPD) circuit configured to generate a digital intermediate signal by compensating an input signal for distortions resulting from an amplifier, and an adaptation circuitry configured to update the first parameter based on the adjustment signal, the input signal, and an output signal output by the amplifier and based on the digital intermediate signal. The DPD circuit includes an infinite impulse response filter configured to implement a transfer function based on a first parameter, and thermal tracking circuitry configured to generate an adjustment signal corresponding to a thermal change of the amplifier.
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公开(公告)号:US10944444B2
公开(公告)日:2021-03-09
申请号:US16142295
申请日:2018-09-26
Applicant: Xilinx, Inc.
Inventor: Christopher H. Dick , Hongzhi Zhao , Hemang M. Parekh , Xiaohan Chen
Abstract: A digital predistortion (DPD) system includes an input configured to receive a DPD input signal. In some embodiments, a non-linear datapath is coupled to the input, where the non-linear datapath includes a plurality of parallel datapath elements each coupled to the input. By way of example, each of the plurality of parallel datapath elements is configured to add a different inverse non-linear component to the DPD input signal corresponding to a non-linear component of an amplifier. In various examples, a first combiner combines an output of each of the plurality of datapath elements to generate a first predistortion signal. In some embodiments, the DPD system further includes a linear datapath coupled to the input in parallel with the non-linear datapath to generate a second predistortion signal. In addition, a second combiner combines the first predistortion signal and the second predistortion signal to generate a DPD output signal.
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公开(公告)号:US10715702B1
公开(公告)日:2020-07-14
申请号:US16351158
申请日:2019-03-12
Applicant: Xilinx, Inc.
Inventor: Hongzhi Zhao , Christopher H. Dick , Xiaohan Chen , Hemang M. Parekh
Abstract: A digital predistortion (DPD) system includes an input configured to receive a DPD input signal. In some examples, a non-linear datapath is coupled to the input, where the non-linear datapath is configured to add a non-linear mirror image component to the DPD input signal to provide a non-linear signal that is used to generate a first predistortion signal. In some embodiments, a linear datapath is coupled to the input in parallel with the non-linear datapath to generate a second predistortion signal. A first combiner is configured to combine the first predistortion signal and the second predistortion signal to generate a DPD output signal.
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