Systems and methods for improved data detection processing
    1.
    发明授权
    Systems and methods for improved data detection processing 有权
    改进数据检测处理的系统和方法

    公开(公告)号:US08880986B2

    公开(公告)日:2014-11-04

    申请号:US13483105

    申请日:2012-05-30

    IPC分类号: H03M13/00

    摘要: The present invention is related to systems and methods for enhancing data detection in a data processing system. In one embodiment, a data processing system is disclosed that includes a data detector circuit that is governed at least in part based upon selected coefficients. The selected coefficients are selected as either a first set of coefficients or a second set of coefficients where the second set of coefficients has fewer coefficients than the first set of coefficients.

    摘要翻译: 本发明涉及用于增强数据处理系统中的数据检测的系统和方法。 在一个实施例中,公开了一种数据处理系统,其包括至少部分地基于所选择的系数来管理的数据检测器电路。 选择的系数被选择为第一组系数或第二组系数,其中第二组系数具有比第一组系数更少的系数。

    Optimized multi-level finite state machine with redundant DC nodes
    5.
    发明授权
    Optimized multi-level finite state machine with redundant DC nodes 有权
    具有冗余DC节点的优化多级有限状态机

    公开(公告)号:US08730067B2

    公开(公告)日:2014-05-20

    申请号:US13564836

    申请日:2012-08-02

    IPC分类号: H03M5/14

    CPC分类号: H03M5/145 H04L1/22

    摘要: A method and system for eliminating/suppressing long transition runs over a communications channel is disclosed. The method may include providing modulation coding based on a multi-level finite state machine (ML-FSM) having a periodic structure, the periodic structure being defined by a predetermined number of time frames. The ML-FSM may include a plurality of penalty-free edges for connecting nodes in one time frame to nodes at the same level in a subsequent time frame and a plurality of penalty edges for connecting nodes in one time frame to nodes at an upper level in the subsequent time frame. The method may further include utilizing the ML-FSM based modulation coding to facilitate data transmission over the communications channel.

    摘要翻译: 公开了一种用于消除/抑制通过通信信道的长过渡运行的方法和系统。 该方法可以包括提供基于具有周期性结构的多级有限状态机(ML-FSM)的调制编码,周期性结构由预定数量的时间帧定义。 ML-FSM可以包括用于将一个时间帧中的节点连接到后续时间帧中的相同电平的节点的多个无罚币边缘,以及用于将一个时间帧中的节点连接到上一级节点的多个惩罚边 在随后的时间内。 该方法还可以包括利用基于ML-FSM的调制编码来促进在通信信道上的数据传输。

    OPTIMIZED MULTI-LEVEL FINITE STATE MACHINE WITH REDUNDANT DC NODES
    6.
    发明申请
    OPTIMIZED MULTI-LEVEL FINITE STATE MACHINE WITH REDUNDANT DC NODES 有权
    优化的多级有限状态机与冗余直流电源

    公开(公告)号:US20140035692A1

    公开(公告)日:2014-02-06

    申请号:US13564836

    申请日:2012-08-02

    IPC分类号: H04L27/10

    CPC分类号: H03M5/145 H04L1/22

    摘要: A method and system for eliminating/suppressing long transition runs over a communications channel is disclosed. The method may include providing modulation coding based on a multi-level finite state machine (ML-FSM) having a periodic structure, the periodic structure being defined by a predetermined number of time frames. The ML-FSM may include a plurality of penalty-free edges for connecting nodes in one time frame to nodes at the same level in a subsequent time frame and a plurality of penalty edges for connecting nodes in one time frame to nodes at an upper level in the subsequent time frame. The method may further include utilizing the ML-FSM based modulation coding to facilitate data transmission over the communications channel.

    摘要翻译: 公开了一种用于消除/抑制通过通信信道的长过渡运行的方法和系统。 该方法可以包括提供基于具有周期性结构的多级有限状态机(ML-FSM)的调制编码,周期性结构由预定数量的时间帧定义。 ML-FSM可以包括用于将一个时间帧中的节点连接到后续时间帧中的相同电平的节点的多个无罚币边缘,以及用于将一个时间帧中的节点连接到上一级节点的多个惩罚边 在随后的时间内。 该方法还可以包括利用基于ML-FSM的调制编码来促进在通信信道上的数据传输。