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公开(公告)号：US12112802B2
公开(公告)日：2024-10-08
申请号：US17974271
申请日：2022-10-26
发明人： Zhihong Li , Jing Wei , Masao Kuriyama
CPC分类号： G11C16/0433 , G11C16/08 , G11C16/102 , G11C16/26
摘要： The present disclosure provides a memory device comprising a memory cell array and a peripheral circuit coupled to the memory cell array. The memory cell array includes a plurality of memory planes; the peripheral circuit includes a plurality of selected voltage selection circuits corresponding to the plurality of memory planes; a plurality of global word line voltage selection circuits respectively corresponding to each memory plane, and a plurality of local word line voltage selection circuits respectively corresponding to each memory plane. The plurality of selected voltage selection circuits are configured to select a voltage from a plurality of selected voltages to output to the global word line voltage selection circuits; the global word line voltage selection circuits are configured to select a voltage from unselected voltages and the voltage output from the plurality of selected voltage selection circuits to output to the local word line voltage selection circuits.
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公开(公告)号：US20240029793A1
公开(公告)日：2024-01-25
申请号：US17974271
申请日：2022-10-26
发明人： Zhihong Li , Jing Wei , Masao Kuriyama
CPC分类号： G11C16/0433 , G11C16/08 , G11C16/102 , G11C16/26
摘要： The present disclosure provides a memory device comprising a memory cell array and a peripheral circuit coupled to the memory cell array. The memory cell array includes a plurality of memory planes; the peripheral circuit includes a plurality of selected voltage selection circuits corresponding to the plurality of memory planes; a plurality of global word line voltage selection circuits respectively corresponding to each memory plane, and a plurality of local word line voltage selection circuits respectively corresponding to each memory plane. The plurality of selected voltage selection circuits are configured to select a voltage from a plurality of selected voltages to output to the global word line voltage selection circuits; the global word line voltage selection circuits are configured to select a voltage from unselected voltages and the voltage output from the plurality of selected voltage selection circuits to output to the local word line voltage selection circuits.
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