公开(公告)号：US20120121708A1

公开(公告)日：2012-05-17

申请号：US12946793

申请日：2010-11-15

申请人： Yan-Ping Chen ,  Feng-Nien Tsai

发明人： Yan-Ping Chen ,  Feng-Nien Tsai

IPC分类号： A61K9/14 ,  A61P27/06 ,  A61P43/00 ,  C07D285/135 ,  A61P7/10 ,  A61P13/02 ,  B32B5/16 ,  A61K31/433 ,  A61P25/08

CPC分类号： C07D285/135 ,  A61K9/141 ,  A61K31/433 ,  Y02P20/544 ,  Y10T428/2982

摘要： A method for preparing an acetazolamide microparticle having a mean particle size ranged between 0.36 μm and 18 μm is provided. The method includes steps of dissolving an acetazolamide in a solvent to form an acetazolamide solution; and mixing the acetazolamide solution with a supercritical fluid at a temperature and a pressure above a critical point of the supercritical fluid for forming the acetazolamide microparticle, wherein the solvent is miscible with the supercritical fluid.

摘要翻译： 提供了平均粒径在0.36μm和18μm之间的制备乙酰唑胺微粒的方法。 该方法包括将乙酰唑胺溶解在溶剂中以形成乙酰唑胺溶液的步骤; 以及在超临界流体临界点的温度和压力下将所述乙酰唑胺溶液与超临界流体混合以形成所述乙酰唑胺微粒，其中所述溶剂与超临界流体混溶。

公开(公告)号：US08692393B2

公开(公告)日：2014-04-08

申请号：US13494879

申请日：2012-06-12

申请人： Feng-Nien Tsai

发明人： Feng-Nien Tsai

IPC分类号： H01L23/544

CPC分类号： H01L23/544 ,  G03F9/7076 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

摘要： Better alignment mark designs for semiconductor devices may substantially lessen the frequency of layer misalignment scanner alignment problems. Exemplary alignment mark designs substantially avoid or minimize damage during the fill-in and etching and chemical mechanical processing processes. Thus, additional processing steps to even out various layers or to address the misalignment problems may also be avoided.

摘要翻译： 用于半导体器件的更好的对准标记设计可以显着地降低层错位扫描器对准问题的频率。 示例性对准标记设计基本上避免或最小化在填充和蚀刻以及化学机械加工过程中的损伤。 因此，也可以避免额外的处理步骤以均衡出各种层或解决不对准问题。

公开(公告)号：USD479805S1

公开(公告)日：2003-09-23

申请号：US29166322

申请日：2002-08-27

申请人： Feng-Nien Tsai

设计人： Feng-Nien Tsai

公开(公告)号：US20140021628A1

公开(公告)日：2014-01-23

申请号：US13607555

申请日：2012-09-07

申请人： Yen-Hao Shih ,  Shih-Hung Chen ,  Teng-Hao Yeh ,  Chih-Wei Hu ,  Feng-Nien Tsai ,  Lo-Yueh Lin

发明人： Yen-Hao Shih ,  Shih-Hung Chen ,  Teng-Hao Yeh ,  Chih-Wei Hu ,  Feng-Nien Tsai ,  Lo-Yueh Lin

IPC分类号： H01L21/768 ,  H01L23/48

CPC分类号： H01L23/5226 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76831 ,  H01L23/53271 ,  H01L23/5329 ,  H01L27/11526 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is used with an IC device including a stack of dielectric/conductive layers to form interlayer connectors extending from a surface of the device to the conductive layers. Contact openings are created through a dielectric layer to a first conductive layer. N etch masks, with 2N−1 being less than W, 2N being greater than or equal to W, have spaced apart open etch regions and mask regions elsewhere. The stack of layers are etched only through W−1 contact openings to create extended contact openings extending to W−1 conductive layers; 2n−1 conductive layers are etched for up to half of the contact openings for each etch mask n=1, 2 . . . N. The contact openings are etched with different combinations of the etch masks' open etch regions. Interlayer connectors are formed in the contact openings.

摘要翻译： 一种使用IC器件的方法包括一叠介电/导电层，以形成从器件表面延伸到导电层的层间连接器。 通过电介质层产生接触开口到第一导电层。 N型蚀刻掩模，其中2N-1小于W，2N大于或等于W，其间具有间隔开的开放蚀刻区域和掩模区域。 层叠层仅通过W-1接触开口蚀刻以产生延伸到W-1导电层的延伸的接触开口; 对于每个蚀刻掩模n = 1,2，2n-1个导电层被蚀刻用于多达一半的接触开口。 。 。 用蚀刻掩模的开放蚀刻区域的不同组合蚀刻接触开口。 中间层连接器形成在接触开口中。

公开(公告)号：US08633099B1

公开(公告)日：2014-01-21

申请号：US13607555

申请日：2012-09-07

申请人： Yen-Hao Shih ,  Shih-Hung Chen ,  Teng-Hao Yeh ,  Chih-Wei Hu ,  Feng-Nien Tsai ,  Lo-Yueh Lin

发明人： Yen-Hao Shih ,  Shih-Hung Chen ,  Teng-Hao Yeh ,  Chih-Wei Hu ,  Feng-Nien Tsai ,  Lo-Yueh Lin

IPC分类号： H01L21/44 ,  H01L21/4763 ,  H01L23/48 ,  H01L29/40

CPC分类号： H01L23/5226 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/32137 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76831 ,  H01L23/53271 ,  H01L23/5329 ,  H01L27/11526 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11582 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is used with an IC device including a stack of dielectric/conductive layers to form interlayer connectors extending from a surface of the device to the conductive layers. Contact openings are created through a dielectric layer to a first conductive layer. N etch masks, with 2N−1 being less than W, 2N being greater than or equal to W, have spaced apart open etch regions and mask regions elsewhere. The stack of layers are etched only through W−1 contact openings to create extended contact openings extending to W−1 conductive layers; 2n−1 conductive layers are etched for up to half of the contact openings for each etch mask n=1, 2 . . . N. The contact openings are etched with different combinations of the etch masks' open etch regions. Interlayer connectors are formed in the contact openings.

摘要翻译： 一种使用IC器件的方法包括一叠介电/导电层，以形成从器件表面延伸到导电层的层间连接。 通过电介质层产生接触开口到第一导电层。 N型蚀刻掩模，其中2N-1小于W，2N大于或等于W，其间具有间隔开的开放蚀刻区域和掩模区域。 层叠层仅通过W-1接触开口蚀刻以产生延伸到W-1导电层的延伸的接触开口; 对于每个蚀刻掩模n = 1,2，2n-1个导电层被蚀刻用于多达一半的接触开口。 。 。 用蚀刻掩模的开放蚀刻区域的不同组合蚀刻接触开口。 中间层连接器形成在接触开口中。