-
1.发明授权Single-chip integrated circuit with capacitive isolation and method for making the same 有权具有电容隔离的单芯片集成电路和制造相同的方法公开(公告)号：US09299655B2
公开(公告)日：2016-03-29
申请号：US13988327
申请日：2011-11-18
CPC分类号： H01L27/0292 , H01L23/48 , H01L23/5222 , H01L23/5223 , H01L23/60 , H01L27/0207 , H01L27/0248 , H01L27/0255 , H01L27/0629 , H01L28/40 , H01L29/0607 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： An integrated circuit, including at least two integrated circuit portions mutually spaced on a single electrically insulating die and at least one coupling region on the die to provide capacitive coupling between the otherwise mutually isolated integrated circuit portions, the integrated circuit portions being formed by a plurality of layers on the single die, the layers including metal and dielectric layers and at least one semiconductor layer; wherein at least one of the dielectric layers extends from the integrated circuit portions across the coupling region and at least a corresponding one of the metal layers and/or at least one semiconductor layer extends from each of the integrated circuit portions and partially across the coupling region to form capacitors therein and thereby provide the capacitive coupling between the integrated circuit portions.
摘要翻译： 一种集成电路，包括在单个电绝缘管芯上相互间隔开的至少两个集成电路部分和管芯上的至少一个耦合区域，以在另外相互隔离的集成电路部分之间提供电容耦合，所述集成电路部分由多个 层，包括金属和介电层以及至少一个半导体层; 其中所述电介质层中的至少一个从所述集成电路部分延伸穿过所述耦合区域，并且所述金属层中的至少一个和/或至少一个半导体层从所述集成电路部分中的每一个延伸并部分地跨过所述耦合区域 以在其中形成电容器，从而提供集成电路部分之间的电容耦合。
-
公开(公告)号：US20140145301A1
公开(公告)日：2014-05-29
申请号：US13988327
申请日：2011-11-18
CPC分类号： H01L27/0292 , H01L23/48 , H01L23/5222 , H01L23/5223 , H01L23/60 , H01L27/0207 , H01L27/0248 , H01L27/0255 , H01L27/0629 , H01L28/40 , H01L29/0607 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： An integrated circuit, including at least two integrated circuit portions mutually spaced on a single electrically insulating die and at least one coupling region on the die to provide capacitive coupling between the otherwise mutually isolated integrated circuit portions, the integrated circuit portions being formed by a plurality of layers on the single die, the layers including metal and dielectric layers and at least one semiconductor layer; wherein at least one of the dielectric layers extends from the integrated circuit portions across the coupling region and at least a corresponding one of the metal layers and/or at least one semiconductor layer extends from each of the integrated circuit portions and partially across the coupling region to form capacitors therein and thereby provide the capacitive coupling between the integrated circuit portions.
摘要翻译： 一种集成电路，包括在单个电绝缘管芯上相互间隔开的至少两个集成电路部分和管芯上的至少一个耦合区域，以在另外相互隔离的集成电路部分之间提供电容耦合，所述集成电路部分由多个 层，包括金属和介电层以及至少一个半导体层; 其中所述电介质层中的至少一个从所述集成电路部分延伸穿过所述耦合区域，并且所述金属层中的至少一个和/或至少一个半导体层从所述集成电路部分中的每一个延伸并部分地跨过所述耦合区域 以在其中形成电容器，从而提供集成电路部分之间的电容耦合。
-
搜索结果
2 条记录 (耗时 0.023 秒)
