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公开(公告)号：US4754400A
公开(公告)日：1988-06-28
申请号：US106030
申请日：1987-10-08
CPC分类号： G06F9/54 , G06F11/3604
摘要： A communication protocol validation system which produces a global state transition chart having a plurality of states and a plurality of transitions between states in electrical form to find an error and/or a deadlock of the protocol has been improved by coupling a plurality of global transitions according to a predetermined algorithm and deleting redundant global transitions. Thus, a number of global states and a number of global transitions in the chart are reduced, and the validation is implemented by using a reasonable amount of hardware in a reasonable time.
摘要翻译： 一种通信协议验证系统，其通过以多个状态和多个状态之间的转换来产生一个全局状态转换图，以便发现该协议的错误和/或死锁，从而通过将多个全局转换 到预定的算法并删除冗余的全局转换。 因此，图表中的一些全局状态和多个全局转换被减少，并且在合理的时间内使用合理数量的硬件来实现验证。
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公开(公告)号：US4802162A
公开(公告)日：1989-01-31
申请号：US930341
申请日：1986-11-12
CPC分类号： H04L29/06 , G01R31/318307 , H04L69/03
摘要： An automatic protocol synthesizing system in which, incomplete state transition diagrams of at least two functionally incomplete processes forming a protocol are received and completed state transition diagrams of the processes are outputted. In accordance with the present invention, there is provided a checking circuit for making a check for a logical error of the incomplete state transition diagram an embedding circuit embeds the state transition diagram of a process corresponding to the incomplete state transition diagram of an ith (where 1.ltoreq.i.ltoreq.N) one of the processes in the ith incomplete state transition diagram. A state transition diagram generating circuit is provided for automatically generating a state transition diagram including all of the remaining (i+1)th and subsequent processes, on the basis of the embedded state transition diagram; and a dividing circuit divides the thus automatically synthesized state transition diagram into the state transition diagram of the (i+1)th one of all the automatically generated processes and the state transition diagram for the other processes. The operations of the checking circuit, the embedding circuit, the state transition diagram generating circuit and the dividing circuit are repeated by (N-1) times to complete the state transition diagram for each process, thereby making the protocol functionally complete.
摘要翻译： 一种自动协议合成系统，其中接收至少两个形成协议的功能不完整过程的不完整状态转移图，并且输出处理的完成状态转换图。 根据本发明，提供了一种用于检查不完全状态转换图的逻辑错误的检查电路，嵌入电路嵌入与第i个不完全状态转移图对应的处理的状态转移图（其中 1
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公开(公告)号：US4694422A
公开(公告)日：1987-09-15
申请号：US749591
申请日：1985-06-24
CPC分类号： G06F9/54 , G06F11/3604 , G06F9/52
摘要： A communication protocol validation system which produces a state transition expansion chart having a plurality of states and a plurality of transitions between states in electrical form to find errors such as an unspecified executable transition, a specified unexecutable transition and a deadlock has been improved by providing new error items of a bounded overflow and an unbounded overflow and deleting redundant transitions. Thus, a number of states and a number of transitions in the chart are reduced, and the validation is implemented by using a reasonable amount of hardware in a reasonable time.
摘要翻译： 一种通信协议验证系统，其产生具有多个状态的状态转换扩展图，并且以电形式的状态之间的多个转换以发现诸如未指定的可执行转换，指定的不可执行转换和死锁之类的错误已经通过提供新的 有界溢出和无限溢出的错误项目以及删除冗余转换。 因此，减少了图表中的多个状态和多个转换，并且通过在合理的时间内使用合理数量的硬件来实现验证。
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