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    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
    6.
    发明申请
    METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 失效
    制造半导体器件的方法

    公开(公告)号：US20110136338A1

    公开(公告)日：2011-06-09

    申请号：US12689344

    申请日：2010-01-19

    申请人： Kunsik Park ,  Kyu-Ha Baek ,  Lee-Mi Do ,  Dong-Pyo Kim ,  Ji Man Park

    发明人： Kunsik Park ,  Kyu-Ha Baek ,  Lee-Mi Do ,  Dong-Pyo Kim ,  Ji Man Park

    IPC分类号： H01L21/768

    CPC分类号： H01L21/76898 ,  H01L21/2885

    摘要： A method of fabricating a semiconductor device includes forming a via hole in a semiconductor substrate, forming an isolation layer on an inner side of the via hole, forming a diffusion barrier layer over an upper portion of the semiconductor substrate and the inner side of the via hole where the isolation layer is formed, arranging a solvent, which contains electrically charged metal particles, on the semiconductor substrate where the diffusion barrier layer is formed, and filling the via hole with the metal particles by moving the metal particles using applied external force. The applied external force said includes a voltage causing an electric current to flow between the semiconductor substrate and the solvent, an electrical field applied between the semiconductor substrate and the solvent, or a magnetic field applied between the semiconductor substrate and the solvent.

    摘要翻译： 一种制造半导体器件的方法包括在半导体衬底中形成通孔，在通孔的内侧形成隔离层，在半导体衬底的上部和通孔的内侧形成扩散阻挡层 形成隔离层的孔，在形成有扩散阻挡层的半导体衬底上布置含有带电荷的金属颗粒的溶剂，并通过使用外力移动金属颗粒来填充通孔。 所施加的外力包括导致电流在半导体衬底和溶剂之间流动的电压，施加在半导体衬底和溶剂之间的电场或施加在半导体衬底和溶剂之间的磁场。

    Method for fabricating semiconductor device
    7.
    发明授权
    Method for fabricating semiconductor device 失效
    制造半导体器件的方法

    公开(公告)号：US07998862B2

    公开(公告)日：2011-08-16

    申请号：US12689344

    申请日：2010-01-19

    申请人： Kunsik Park ,  Kyu-Ha Baek ,  Lee-Mi Do ,  Dong-Pyo Kim ,  Ji Man Park

    发明人： Kunsik Park ,  Kyu-Ha Baek ,  Lee-Mi Do ,  Dong-Pyo Kim ,  Ji Man Park

    IPC分类号： H01L21/4763 ,  H01L21/44

    CPC分类号： H01L21/76898 ,  H01L21/2885

    摘要： A method of fabricating a semiconductor device includes forming a via hole in a semiconductor substrate, forming an isolation layer on an inner side of the via hole, forming a diffusion barrier layer over an upper portion of the semiconductor substrate and the inner side of the via hole where the isolation layer is formed, arranging a solvent, which contains electrically charged metal particles, on the semiconductor substrate where the diffusion barrier layer is formed, and filling the via hole with the metal particles by moving the metal particles using applied external force. The applied external force said includes a voltage causing an electric current to flow between the semiconductor substrate and the solvent, an electrical field applied between the semiconductor substrate and the solvent, or a magnetic field applied between the semiconductor substrate and the solvent.

    摘要翻译： 一种制造半导体器件的方法包括在半导体衬底中形成通孔，在通孔的内侧形成隔离层，在半导体衬底的上部和通孔的内侧形成扩散阻挡层 形成隔离层的孔，在形成有扩散阻挡层的半导体衬底上布置含有带电荷的金属颗粒的溶剂，并通过使用外力移动金属颗粒来填充通孔。 所施加的外力包括导致电流在半导体衬底和溶剂之间流动的电压，施加在半导体衬底和溶剂之间的电场或施加在半导体衬底和溶剂之间的磁场。

    METHODS OF FORMING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICES FORMED BY THE SAME
    8.
    发明申请
    METHODS OF FORMING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICES FORMED BY THE SAME 审中-公开
    形成半导体器件的方法和由其形成的半导体器件

    公开(公告)号：US20120056331A1

    公开(公告)日：2012-03-08

    申请号：US13226421

    申请日：2011-09-06

    申请人： Kunsik Park

    发明人： Kunsik Park

    IPC分类号： H01L23/48 ,  H01L21/768

    CPC分类号： H01L21/76898

    摘要： Provided are a method of forming a semiconductor device including a via and a semiconductor device formed by the same. In the method, by forming an unseeded layer that covers a seed layer disposed on a substrate and at a side wall of a via hole, exposes the seed layer disposed at a bottom of the via hole, and cannot serve as a seed, a plated layer configuring the via is formed upward from the seed layer in a bottom-up growth process, and thus, a void is not formed. Also, an inlet of the via hole is not blocked by using the bottom-up growth process, and thus, an electroplating speed can increase, thereby shortening a time taken in filling the via hole with a metal.

    摘要翻译： 提供一种形成半导体器件的方法，该半导体器件包括通孔和由其形成的半导体器件。 在该方法中，通过形成覆盖设置在基板上的种子层和通路孔的侧壁的未密封层，露出设置在通孔底部的种子层，不能作为种子，镀层 在自底向上生长过程中从种子层向上形成构造通孔的层，因此不形成空隙。 而且，通过使用自底向上生长工艺，通孔的入口不会被阻挡，因此电镀速度可以增加，从而缩短了用金属填充通孔所花费的时间。