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    Predictive Thermal Preconditioning and Timing Control for Non-Volatile Memory Cells
    1.
    发明申请
    Predictive Thermal Preconditioning and Timing Control for Non-Volatile Memory Cells 有权
    非易失性记忆体的预测热预处理和时序控制

    公开(公告)号：US20120147665A1

    公开(公告)日：2012-06-14

    申请号：US13400515

    申请日：2012-02-20

    申请人： Yiran Chen ,  Hai Li ,  Harry Hongyue Liu ,  Dimitar V. Dimitrov ,  Alan Xuguang Wang ,  Xiaobin Wang

    发明人： Yiran Chen ,  Hai Li ,  Harry Hongyue Liu ,  Dimitar V. Dimitrov ,  Alan Xuguang Wang ,  Xiaobin Wang

    IPC分类号： G11C11/16 ,  G11C7/00

    CPC分类号： G11C11/1675 ,  G11C11/1659

    摘要： Method and apparatus for using thermal preconditioning to write data to a non-volatile memory cell. In accordance with some embodiments, a semiconductor memory has an array of non-volatile memory cells, and a control circuit which stores a first write command from a host to write data to said array. A write circuit flows a write current through an unconditioned first selected cell having a first block address associated with the first write command to write the first selected cell to a selected data state, and concurrently passes a thermal preconditioning current through a second selected cell having a second block address associated with the first block address. The write circuit further passes a thermal preconditioning current through a third selected cell having a third block address associated with the second block address in response to receipt by the control circuit of a second write command from the host associated with the second block address.

    摘要翻译： 使用热预处理将数据写入非易失性存储单元的方法和装置。 根据一些实施例，半导体存储器具有非易失性存储器单元的阵列，以及存储来自主机的第一写命令以将数据写入所述阵列的控制电路。 写入电路通过具有与第一写入命令相关联的第一块地址的无条件的第一选定单元流动写入电流，以将第一选定单元写入所选择的数据状态，并且同时通过热预处理电流通过具有 与第一块地址相关联的第二块地址。 响应于控制电路接收到与第二块地址相关联的主机的第二写入命令，写入电路进一步传递热预处理电流通过具有与第二块地址相关联的第三块地址的第三选定单元。

    Predictive thermal preconditioning and timing control for non-volatile memory cells
    6.
    发明授权
    Predictive thermal preconditioning and timing control for non-volatile memory cells 有权
    非易失性存储单元的预测性热预处理和时序控制

    公开(公告)号：US08553454B2

    公开(公告)日：2013-10-08

    申请号：US13400515

    申请日：2012-02-20

    申请人： Yiran Chen ,  Hai Li ,  Harry Hongyue Liu ,  Dimitar V. Dimitrov ,  Alan Xuguang Wang ,  Xiaobin Wang

    发明人： Yiran Chen ,  Hai Li ,  Harry Hongyue Liu ,  Dimitar V. Dimitrov ,  Alan Xuguang Wang ,  Xiaobin Wang

    IPC分类号： G11C11/14 ,  G11C8/00 ,  G11C7/00

    CPC分类号： G11C11/1675 ,  G11C11/1659

    摘要： Method and apparatus for using thermal preconditioning to write data to a non-volatile memory cell. In accordance with some embodiments, a semiconductor memory has an array of non-volatile memory cells, and a control circuit which stores a first write command from a host to write data to said array. A write circuit flows a write current through an unconditioned first selected cell having a first block address associated with the first write command to write the first selected cell to a selected data state, and concurrently passes a thermal preconditioning current through a second selected cell having a second block address associated with the first block address. The write circuit further passes a thermal preconditioning current through a third selected cell having a third block address associated with the second block address in response to receipt by the control circuit of a second write command from the host associated with the second block address.

    摘要翻译： 使用热预处理将数据写入非易失性存储单元的方法和装置。 根据一些实施例，半导体存储器具有非易失性存储器单元的阵列，以及存储来自主机的第一写命令以将数据写入所述阵列的控制电路。 写入电路通过具有与第一写入命令相关联的第一块地址的无条件的第一选定单元流动写入电流，以将第一选定单元写入所选择的数据状态，并且同时通过热预处理电流通过具有 与第一块地址相关联的第二块地址。 响应于控制电路接收到与第二块地址相关联的主机的第二写入命令，写入电路进一步传递热预处理电流通过具有与第二块地址相关联的第三块地址的第三选定单元。