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公开(公告)号：US07577894B2
公开(公告)日：2009-08-18
申请号：US10929675
申请日：2004-08-31
申请人： Yoshihiko Takeda , Shigeyoshi Ohara
发明人： Yoshihiko Takeda , Shigeyoshi Ohara
IPC分类号： H03M13/00
CPC分类号： G06F11/1004 , G06F21/64 , H03M13/09 , H03M13/6561 , H04L1/0052 , H04L1/0061 , H04L1/008
摘要： When a plurality of data blocks are divided into a plurality of frames and the divided frames are transmitted, every time a frame is received, a interim calculation result of a check code is updated using a transitional calculation result of the check code of the data block corresponding to the frame received and the data included in the frame. When a final calculation result of the check code of a data block is obtained, the calculation result is compared with the check code included in the data block.
摘要翻译： 当将多个数据块划分成多个帧并且分割的帧被发送时，每当接收到帧时，使用数据块的校验码的过渡计算结果来更新校验码的临时计算结果 对应于所接收的帧和包括在帧中的数据。 当获得数据块的校验码的最终计算结果时，将计算结果与数据块中包括的校验码进行比较。
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公开(公告)号：US20050204238A1
公开(公告)日：2005-09-15
申请号：US10929675
申请日：2004-08-31
申请人： Yoshihiko Takeda , Shigeyoshi Ohara
发明人： Yoshihiko Takeda , Shigeyoshi Ohara
CPC分类号： G06F11/1004 , G06F21/64 , H03M13/09 , H03M13/6561 , H04L1/0052 , H04L1/0061 , H04L1/008
摘要： When a plurality of data blocks are divided into a plurality of frames and the divided frames are transmitted, every time a frame is received, a interim calculation result of a check code is updated using a transitional calculation result of the check code of the data block corresponding to the frame received and the data included in the frame. When a final calculation result of the check code of a data block is obtained, the calculation result is compared with the check code included in the data block.
摘要翻译： 当将多个数据块划分成多个帧并且分割的帧被发送时，每当接收到帧时，使用数据块的校验码的过渡计算结果来更新校验码的临时计算结果 对应于所接收的帧和包括在帧中的数据。 当获得数据块的校验码的最终计算结果时，将计算结果与数据块中包括的校验码进行比较。
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3.发明授权Data storage system and control apparatus with a switch unit connected to a plurality of first channel adapter and modules wherein mirroring is performed 有权具有连接到多个第一通道适配器和模块的开关单元的数据存储系统和控制装置，其中执行镜像公开(公告)号：US07418533B2
公开(公告)日：2008-08-26
申请号：US11378379
申请日：2006-03-20
IPC分类号： G06F15/16
CPC分类号： G06F3/0658 , G06F3/061 , G06F3/0611 , G06F3/0613 , G06F3/067 , G06F3/0683 , G06F11/2089 , G06F11/2097 , G06F12/0866 , G06F2212/284
摘要： A storage system has a plurality of control modules for controlling a storage device for accesses from a mainframe host and an open system host respectively supporting different protocols. An open channel adaptor and a mainframe channel adaptor are separately provided. The mainframe channel adaptor is connected to a plurality of control managers via front routers and performs parallel write access from the mainframe host for mirroring. In the write processing for the mainframe host, the connection is maintained until the completion of processing. In particular, even in case of a write miss, disk read processing can be performed in parallel, thus contributing to the high-speed processing in case of the write miss. Further, for an access from the open system host, a high throughput can be obtained.
摘要翻译： 存储系统具有多个控制模块，用于控制来自分别支持不同协议的主机主机和开放系统主机的存取的存储装置。 单独提供开放通道适配器和主机通道适配器。 大型机通道适配器通过前端路由器连接到多个控制管理器，并从主机主机执行并行写访问以进行镜像。 在大型机主机的写入处理中，连接保持到处理完成。 特别地，即使在写入未命中的情况下，可以并行执行盘读取处理，从而有助于在写入错误的情况下的高速处理。 此外，对于从开放系统主机的访问，可以获得高吞吐量。
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公开(公告)号：US20060117159A1
公开(公告)日：2006-06-01
申请号：US11138299
申请日：2005-05-27
IPC分类号： G06F13/28
CPC分类号： G06F3/0689 , G06F3/0605 , G06F3/0619 , G06F3/0629 , G06F3/0665 , G06F3/0683 , G06F11/201 , G06F11/2089 , G06F12/0866
摘要： A storage system has a plurality of control modules for controlling a plurality of storage devices, which make mounting easier with maintaining low latency response even if the number of control modules increases. A plurality of storage devices are connected to the second interface of each control module using back end routers, so that redundancy for all the control modules to access all the storage devices is maintained. Also the control modules and the first switch units are connected by a serial bus, which has a small number of signals, constituting the interface by using the back panel. By this, mounting on the printed circuit board becomes possible.
摘要翻译： 存储系统具有用于控制多个存储设备的多个控制模块，即使控制模块的数量增加，这也使得安装更容易，同时保持较低的延迟响应。 使用后端路由器将多个存储设备连接到每个控制模块的第二接口，从而保持所有控制模块对所有存储设备的冗余。 此外，控制模块和第一开关单元通过使用后面板构成接口的具有少量信号的串行总线连接。 由此，可以在印刷电路板上安装。
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5.发明授权Computer system using serial connect bus, and method for interconnecting a plurality of CPU using serial connect bus 有权使用串行连接总线的计算机系统，以及使用串行连接总线互连多个CPU的方法公开(公告)号：US07565474B2
公开(公告)日：2009-07-21
申请号：US11168440
申请日：2005-06-29
IPC分类号： G06F13/00
CPC分类号： G06F13/28
摘要： A computer system enable system operation by hiding the peculiarity of an upstream port of a switch in a computer system in which a plurality of CPU units are interconnected by a PCI Express switch. When a CPU unit, which is connected to the upstream port of a serial connect switch interconnecting the plurality of CPU units, is unable to operate, and the links between the CPU units and the switch cannot be established, a management controller in the switch unit is selected as a device of the upstream port.
摘要翻译： 计算机系统通过隐藏其中多个CPU单元由PCI Express交换机互连的计算机系统中的交换机的上游端口的特性来实现系统操作。 当连接到互连多个CPU单元的串行连接交换机的上游端口的CPU单元不能操作，并且CPU单元和交换机之间的链路不能建立时，开关单元中的管理控制器 被选为上游端口的设备。
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公开(公告)号：US20070162561A1
公开(公告)日：2007-07-12
申请号：US11378379
申请日：2006-03-20
IPC分类号： G06F15/16
CPC分类号： G06F3/0658 , G06F3/061 , G06F3/0611 , G06F3/0613 , G06F3/067 , G06F3/0683 , G06F11/2089 , G06F11/2097 , G06F12/0866 , G06F2212/284
摘要： A storage system has a plurality of control modules for controlling a storage device for accesses from a mainframe host and an open system host respectively supporting different protocols. An open channel adaptor and a mainframe channel adaptor are separately provided. The mainframe channel adaptor is connected to a plurality of control managers via front routers and performs parallel write access from the mainframe host for mirroring. In the write processing for the mainframe host, the connection is maintained until the completion of processing. In particular, even in case of a write miss, disk read processing can be performed in parallel, thus contributing to the high-speed processing in case of the write miss. Further, for an access from the open system host, a high throughput can be obtained.
摘要翻译： 存储系统具有多个控制模块，用于控制来自分别支持不同协议的主机主机和开放系统主机的存取的存储装置。 单独提供开放通道适配器和主机通道适配器。 大型机通道适配器通过前端路由器连接到多个控制管理器，并从主机主机执行并行写访问以进行镜像。 在大型机主机的写入处理中，连接保持到处理完成。 特别地，即使在写入未命中的情况下，可以并行执行盘读取处理，从而有助于在写入错误的情况下的高速处理。 此外，对于从开放系统主机的访问，可以获得高吞吐量。
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7.发明申请公开(公告)号：US20060174048A1
公开(公告)日：2006-08-03
申请号：US11133335
申请日：2005-05-20
IPC分类号： G06F13/14
CPC分类号： G06F13/4022 , G06F13/28
摘要： Before the link of each port of a switch provide with a plurality of ports for interconnecting a plurality of process nodes by a serial bus is established, it is checked whether each process node is mounted. Then, of the plurality of ports, a port to which one of mounted process nodes is connected is assigned as an upstream port and the other ports are assigned as downstream ports.
摘要翻译： 在交换机每个端口的链路提供用于通过串行总线互连多个处理节点的多个端口之前，检查每个进程节点是否被安装。 然后，在多个端口中，连接有安装的处理节点的端口被分配为上行端口，并且其他端口被分配为下行端口。
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8.发明授权公开(公告)号：US07461194B2
公开(公告)日：2008-12-02
申请号：US11133335
申请日：2005-05-20
CPC分类号： G06F13/4022 , G06F13/28
摘要： Before the link of each port of a switch provide with a plurality of ports for interconnecting a plurality of process nodes by a serial bus is established, it is checked whether each process node is mounted. Then, of the plurality of ports, a port to which one of mounted process nodes is connected is assigned as an upstream port and the other ports are assigned as downstream ports.
摘要翻译： 在交换机每个端口的链路提供用于通过串行总线互连多个处理节点的多个端口之前，检查每个进程节点是否被安装。 然后，在多个端口中，连接有安装的处理节点的端口被分配为上行端口，并且其他端口被分配为下行端口。
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公开(公告)号：US20070112984A1
公开(公告)日：2007-05-17
申请号：US11528696
申请日：2006-09-28
申请人： Shigeyoshi Ohara
发明人： Shigeyoshi Ohara
IPC分类号： G06F13/00
CPC分类号： G06F13/4226
摘要： A sideband bus setting system in which multiple target devices (ICs) are communicably connected to a master device through a bus so as to set data to ICs mounted on an electronic device. The target device is provided with a target domain ID identifying a target domain-which is a subgroup of multiple target devices, and the master device is provided with the same target domain ID as that provided for the target device. The master device receives the target domain ID from the target device, and performs data-setting process to the target device when the target domain ID received from the target device coincides with the target domain ID provided for the master device. According to the above feature, the failure of the bus (for example, the failure of a sideband multiplexer) can be detected in advance, thereby preventing overlooking the improper data-setting operation.
摘要翻译： 一种边带总线设置系统，其中多个目标设备（IC）通过总线可通信地连接到主设备，以便将数据设置到安装在电子设备上的IC。 目标设备具有识别作为多个目标设备的子组的目标域的目标域ID，并且向主设备提供与为目标设备提供的目标域ID相同的目标域ID。 主设备从目标设备接收目标域ID，并且当从目标设备接收的目标域ID与为主设备提供的目标域ID一致时，向目标设备执行数据设置处理。 根据上述特征，可以预先检测总线的故障（例如，边带复用器的故障），从而防止忽视不正确的数据设置操作。
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公开(公告)号：US20060200614A1
公开(公告)日：2006-09-07
申请号：US11168440
申请日：2005-06-29
IPC分类号： G06F13/00
CPC分类号： G06F13/28
摘要： A computer system enable system operation by hiding the peculiarity of an upstream port of a switch in a computer system in which a plurality of CPU units are interconnected by a PCI Express switch. When a CPU unit, which is connected to the upstream port of a serial connect switch interconnecting the plurality of CPU units, is unable to operate, and the links between the CPU units and the switch cannot be established, a management controller in the switch unit is selected as a device of the upstream port.
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