摘要:
Disclosed is a charge-controlling semiconductor integrated circuit including: a current-controlling MOS transistor; a current detection circuit including a 1/N size current-detecting MOS transistor; and a gate voltage control circuit, wherein the current detection circuit includes an operational amplifier circuit, a bias condition of the current-detecting MOS transistor becomes same as the current-controlling MOS transistor based on an operational amplifier circuit output, voltage drops in lines from drain electrode to a corresponding input point of the operational amplifier circuit become the same by a parasitic resistance, and when the output of the operational amplifier circuit is applied to a control terminal of the bias condition controlling transistor, the drain voltages become the same potential, and the line from the drain electrode of the current-detecting MOS transistor to the input point is formed to be redundantly arranged inside the chip so that a parasitic resistance becomes a predetermined value.
摘要:
A charge-controlling semiconductor integrated circuit includes a current- controlling MOS transistor which is connected between a voltage input terminal and an output terminal and controls flowing current, a substratum voltage switching circuit connected between the voltage input/output terminal and a substratum to which an input/output voltage is applied, and a voltage comparison circuit to compare the input/output voltage. The charge-controlling semiconductor integrated circuit controls the substratum voltage switching circuit based on an output of the voltage comparison circuit, and the voltage comparison circuit includes an intentional offset in a first potential direction. A level shift circuit to shift the output voltage to a potential direction opposite to the first potential direction is provided in a preceding stage of a first input terminal of the voltage comparison circuit, and the input voltage is input to a second input terminal of the voltage comparison circuit.
摘要:
Disclosed a charge-controlling semiconductor integrated circuit comprising: a current-controlling MOS transistor connected between a voltage input terminal and an output terminal and controls flowing current; a substratum voltage switching circuit connected between the voltage input/output terminal and a substratum to which an input/output voltage is applied; and a voltage comparison circuit to compare the input/output voltage, wherein the charge-controlling semiconductor integrated circuit controls the substratum voltage switching circuit based on an output of the voltage comparison circuit, the voltage comparison circuit includes an intentional offset in a first potential direction, and in a preceding stage of a first input terminal of the voltage comparison circuit, a level shift circuit to shift the output voltage to an opposite potential direction is provided, and to a second input terminal of the voltage comparison circuit, the input voltage is input.
摘要:
Disclosed is a charge-controlling semiconductor integrated circuit including: a current-controlling MOS transistor; a current detection circuit including a 1/N size current-detecting MOS transistor; and a gate voltage control circuit, wherein the current detection circuit includes an operational amplifier circuit, a bias condition of the current-detecting MOS transistor becomes same as the current-controlling MOS transistor based on an operational amplifier circuit output, voltage drops in lines from drain electrode to a corresponding input point of the operational amplifier circuit become the same by a parasitic resistance, and when the output of the operational amplifier circuit is applied to a control terminal of the bias condition controlling transistor, the drain voltages become the same potential, and the line from the drain electrode of the current-detecting MOS transistor to the input point is formed to be redundantly arranged inside the chip so that a parasitic resistance becomes a predetermined value.
摘要:
A charge controller includes a charge control circuit that, when detecting that a charging power supply is connected, controls the charging transistor to apply the charge current; a first and second control switch element connected in series between one terminal of a secondary battery and an external terminal; and a protection circuit that, when the secondary battery is over-discharged, turns off the first control switch element to stop discharge current and when deeply discharged, turns off the second control switch element. The protection circuit sends a charge inhibit signal to the charge control circuit when the secondary battery is deeply discharged, and while receiving the charge inhibit signal, the charge control circuit keeps the charging transistor off to prevent the charge current from flowing even if detecting that the charging power supply is connected.
摘要:
A charge circuit includes a current limiting circuit configured to limit a current input from an input terminal; a first transistor connected between an output terminal of the current limiting circuit and a secondary battery; a charge control circuit configured to turn the first transistor on and off to start and stop supply of a charge current to the secondary battery; a second transistor configured to output a current proportional to the charge current flowing through the first transistor; and a charge timer configured to generate clock pulses according to the current output from the second transistor. The charge control circuit is configured to turn off the first transistor to stop the supply of the charge current to the secondary battery when the number of the clock pulses reaches a predetermined number.
摘要:
A charge controller includes a charge control circuit that, when detecting that a charging power supply is connected, controls the charging transistor to apply the charge current; a first and second control switch element connected in series between one terminal of a secondary battery and an external terminal; and a protection circuit that, when the secondary battery is over-discharged, turns off the first control switch element to stop discharge current and when deeply discharged, turns off the second control switch element. The protection circuit sends a charge inhibit signal to the charge control circuit when the secondary battery is deeply discharged, and while receiving the charge inhibit signal, the charge control circuit keeps the charging transistor off to prevent the charge current from flowing even if detecting that the charging power supply is connected.
摘要:
A charge circuit includes a current limiting circuit configured to limit a current input from an input terminal; a first transistor connected between an output terminal of the current limiting circuit and a secondary battery; a charge control circuit configured to turn the first transistor on and off to start and stop supply of a charge current to the secondary battery; a second transistor configured to output a current proportional to the charge current flowing through the first transistor; and a charge timer configured to generate clock pulses according to the current output from the second transistor. The charge control circuit is configured to turn off the first transistor to stop the supply of the charge current to the secondary battery when the number of the clock pulses reaches a predetermined number.
摘要:
A charge control device for controlling charging of a secondary battery by using a current limit function of an external power supply includes: a charge control element arranged to be connected in series between the external power supply and the secondary battery; a constant current control unit configured to control an output current of the charge control element to be constant; a constant voltage control unit configured to control an output voltage of the charge control element to be constant; and an ON state setting unit configured to set the charge control element to an ON state, wherein the charge control element includes a control terminal to which a control signal for controlling the output current and the output voltage is input, and is composed of a single output element.
摘要:
In initial generation (for example, shipping from the factory), a security device generates an identifier w specific to the security device, with the PUF technology, generates key information k (k=HF(k)) from the identifier w, generates encrypted confidential information x by encrypting (x=Enc(mk, k)) confidential information mk with the key information k, and stores the encrypted confidential information x and an authentication code h (h=HF′(k)) of the key information k, in a nonvolatile memory. In operation, the security device generates the identifier w with the PUF technology, generates the key information k from the identifier w, and decrypts the encrypted confidential information x with the key information k. At a timing where the identifier w is generated in the operation, the security device checks whether the current operating environment has largely changed from the initial generation (S311). If a change in operating environment is detected (S311→S312), the security device conducts a reset-up process (S312 to S315) of an authentication code h which is confidential information, and the encrypted confidential information x.