公开(公告)号：US5498939A

公开(公告)日：1996-03-12

申请号：US370313

申请日：1995-01-09

申请人： Kooji Fukuma ,  Soichi Sakurai ,  Nobutaka Okuyama ,  Yoshio Satoh ,  Yoshihiro Obara

发明人： Kooji Fukuma ,  Soichi Sakurai ,  Nobutaka Okuyama ,  Yoshio Satoh ,  Yoshihiro Obara

IPC分类号： H04N9/28 ,  H01J29/70 ,  H04N9/285 ,  H01J29/56

CPC分类号： H04N9/285 ,  H01J29/70 ,  H01J2229/703

摘要： A deflection yoke attached to a color cathode ray tube forming multiple electron beams arranged in line, and in particular a deflection yoke having convergence correction apparatus. Circuit components such as a plurality of resistors, variable resistors, and diodes are connected in parallel with vertical deflection coils. A part of a vertical deflection current flowing through the vertical deflection coils is diverted to the circuit components. Furthermore, the amount of the diverted current is made adjustable so that it will differ between a former part of a vertical deflection period and a latter part thereof. As a result, horizontal line misconvergence at upper and lower ends of the screen can be completely corrected.

摘要翻译： 附接到彩色阴极射线管的偏转线圈，其形成多个沿线排列的电子束，特别是具有会聚校正装置的偏转线圈。 诸如多个电阻器，可变电阻器和二极管的电路部件与垂直偏转线圈并联连接。 流过垂直偏转线圈的垂直偏转电流的一部分被转移到电路部件。 此外，转向电流的量是可调节的，使得其在垂直偏转周期的前一部分和其后部分之间将不同。 结果，可以完全校正屏幕上下端的水平线失会聚。

公开(公告)号：US5523658A

公开(公告)日：1996-06-04

申请号：US446003

申请日：1995-05-19

申请人： Kouji Fukuma ,  Nobutaka Okuyama ,  Soichi Sakurai ,  Hiroshi Yoshioka ,  Yoshihiro Obara ,  Takahisa Mizuta

发明人： Kouji Fukuma ,  Nobutaka Okuyama ,  Soichi Sakurai ,  Hiroshi Yoshioka ,  Yoshihiro Obara ,  Takahisa Mizuta

IPC分类号： H04N9/28 ,  H01J29/70 ,  H04N9/29 ,  H01J29/51

CPC分类号： H01J29/705 ,  H04N9/29

摘要： A deflection yoke device comprises a convergence correction circuit connected between a vertical deflection coil and correction coils. The convergence correction circuit includes a first, second and third impedance elements connected in parallel and at least two diodes. The diodes are connected in series in the same direction and respond to a vertical deflection current of the vertical deflection coil to regulate a current flowing through the correction coils to thereby correct the YH mis-convergence.

摘要翻译： 偏转线圈装置包括连接在垂直偏转线圈和校正线圈之间的会聚校正电路。 会聚校正电路包括并联连接的第一，第二和第三阻抗元件以及至少两个二极管。 二极管以相同的方向串联连接并响应于垂直偏转线圈的垂直偏转电流，以调节流过校正线圈的电流，从而校正YH误差。

公开(公告)号：US20080284893A1

公开(公告)日：2008-11-20

申请号：US12122125

申请日：2008-05-16

申请人： Yoshihiro Obara

发明人： Yoshihiro Obara

IPC分类号： H04N5/335

CPC分类号： H01L27/14843 ,  H01L27/14806

摘要： A signal charge transfer channel region includes a first polysilicon gate electrode as a storage electrode for storing signal charges and a second polysilicon gate electrode as a barrier electrode for transferring the signal charges stored under the first polysilicon gate electrode to under the first polysilicon gate electrode adjacent to the first polysilicon gate electrode. The both end portions of the plurality of first and second polysilicon gate electrodes are alternately arranged perpendicularly to a transfer direction of signal charges and central portions thereof are alternately arranged obliquely to a transfer direction of signal charges.

摘要翻译： 信号电荷传输沟道区域包括作为用于存储信号电荷的存储电极的第一多晶硅栅极电极和作为阻挡电极的第二多晶硅栅电极，用于将存储在第一多晶硅栅电极下面的信号电荷转移到第一多晶硅栅电极附近 到第一多晶硅栅电极。 多个第一和第二多晶硅栅极的两端部与信号电荷的传输方向垂直地交替配置，其中心部分与信号电荷的传输方向相反地交替布置。

公开(公告)号：US5017900A

公开(公告)日：1991-05-21

申请号：US479760

申请日：1990-02-09

申请人： Mitugu Ura ,  Yoshihiro Obara ,  Kazushi Takahashi

发明人： Mitugu Ura ,  Yoshihiro Obara ,  Kazushi Takahashi

IPC分类号： H01J29/00

CPC分类号： H01J29/003 ,  H01J2229/0023

摘要： A deflection yoke is constructed of a truncated conical hollow core, a pair of saddle-shaped horizontal deflection coils disposed inside the core, and a pair of toroidal vertical deflection coils wound on the core or a pair of vertical deflection coils wound in a saddle-like configuration and arranged in the vicinity of the core. A pair of cancellation coils opposing each other on an imaginary axis which passes through a central axis of the core in the direction of vertical deflection are arranged near front end sections of the vertical deflection coils, respectively. A central axis of each of said cancellation coils is inclined at a predetermined angle relative to the central axis of the core. The cancellation coils are connected with the horizontal deflection coils, respectively.

摘要翻译： 偏转线圈由截头圆锥形空心铁芯，一对鞍形水平偏转线圈组成，设置在铁心内部，一对环形垂直偏转线圈缠绕在铁心上，或一对垂直偏转线圈， 配置在核心附近。 分别在垂直偏转线圈的前端部分附近，在沿着垂直偏转方向穿过芯的中心轴的虚轴上相对的一对取消线圈。 每个所述消除线圈的中心轴线相对于芯的中心轴线以预定角度倾斜。 消除线圈分别与水平偏转线圈相连。

公开(公告)号：US09177990B2

公开(公告)日：2015-11-03

申请号：US13225846

申请日：2011-09-06

申请人： Ken Tomita ,  Yoshihiro Obara

发明人： Ken Tomita ,  Yoshihiro Obara

IPC分类号： H01L31/18 ,  H01L21/22 ,  H01L27/146 ,  G03F1/28

CPC分类号： H01L27/14683 ,  G03F1/28

摘要： A method for forming an impurity layer, includes forming a resist material 16 on a surface portion of a semiconductor substrate 15; exposing the resist material using a grating mask 10 comprising a light transmission region 11 including a plurality of unit light transmission regions 14 being arranged two-dimensionally, each being composed of a plurality of minute partial sections 13A to 13D having different transmittance; forming a resist layer 18 on the surface of the semiconductor substrate 15 by developing the exposed resist material, the resist layer including a thin film region 17 having a film thickness corresponding to the transmittance of the light transmission region; implanting ions to the semiconductor substrate 15 via the thin film region; and diffusing ion groups 21A′, 21B′, 21C′, and 21D′ that are implanted at the same depth such that the ion groups are coupled in a lateral direction.

摘要翻译： 一种形成杂质层的方法包括在半导体衬底15的表面部分上形成抗蚀剂材料16; 使用包括透光区域11的光栅掩模10曝光抗蚀剂材料，光栅掩模10包括二维布置的多个单位光透射区域14，每个单元透光区域14由具有不同透射率的多个微小部分部分13A至13D组成; 通过显影所述曝光的抗蚀剂材料在所述半导体衬底15的表面上形成抗蚀剂层18，所述抗蚀剂层包括具有对应于所述透光区域的透射率的膜厚度的薄膜区域17; 通过薄膜区域将离子注入到半导体衬底15; 和扩散离子组21A'，21B'，21C'和21D'，其以相同的深度植入，使得离子基团沿横向连接。

公开(公告)号：US20120077304A1

公开(公告)日：2012-03-29

申请号：US13225846

申请日：2011-09-06

申请人： Ken TOMITA ,  Yoshihiro Obara

发明人： Ken TOMITA ,  Yoshihiro Obara

IPC分类号： H01L31/18 ,  H01L21/22

CPC分类号： H01L27/14683 ,  G03F1/28

摘要： A method for forming an impurity layer, includes forming a resist material 16 on a surface portion of a semiconductor substrate 15; exposing the resist material using a grating mask 10 comprising a light transmission region 11 including a plurality of unit light transmission regions 14 being arranged two-dimensionally, each being composed of a plurality of minute partial sections 13A to 13D having different transmittance; forming a resist layer 18 on the surface of the semiconductor substrate 15 by developing the exposed resist material, the resist layer including a thin film region 17 having a film thickness corresponding to the transmittance of the light transmission region; implanting ions to the semiconductor substrate 15 via the thin film region; and diffusing ion groups 21A′, 21B′, 21C′, and 21D′ that are implanted at the same depth such that the ion groups are coupled in a lateral direction.

摘要翻译： 一种形成杂质层的方法包括在半导体衬底15的表面部分上形成抗蚀剂材料16; 使用包括透光区域11的光栅掩模10曝光抗蚀剂材料，光栅掩模10包括二维布置的多个单位光透射区域14，每个由多个具有不同透射率的微小部分部分13A至13D组成; 通过显影所述曝光的抗蚀剂材料在所述半导体衬底15的表面上形成抗蚀剂层18，所述抗蚀剂层包括具有对应于所述透光区域的透射率的膜厚度的薄膜区域17; 通过薄膜区域将离子注入到半导体衬底15; 和扩散离子组21A'，21B'，21C'和21D'，其以相同的深度植入，使得离子基团沿横向连接。

公开(公告)号：US08004589B2

公开(公告)日：2011-08-23

申请号：US12122125

申请日：2008-05-16

申请人： Yoshihiro Obara

发明人： Yoshihiro Obara

IPC分类号： H04N5/335

CPC分类号： H01L27/14843 ,  H01L27/14806

摘要： A signal charge transfer channel region includes a first polysilicon gate electrode as a storage electrode for storing signal charges and a second polysilicon gate electrode as a barrier electrode for transferring the signal charges stored under the first polysilicon gate electrode to under the first polysilicon gate electrode adjacent to the first polysilicon gate electrode. The both end portions of the plurality of first and second polysilicon gate electrodes are alternately arranged perpendicularly to a transfer direction of signal charges and central portions thereof are alternately arranged obliquely to a transfer direction of signal charges.

摘要翻译： 信号电荷传输沟道区域包括作为用于存储信号电荷的存储电极的第一多晶硅栅极电极和作为阻挡电极的第二多晶硅栅电极，用于将存储在第一多晶硅栅电极下面的信号电荷转移到第一多晶硅栅电极附近 到第一多晶硅栅电极。 多个第一和第二多晶硅栅极的两端部与信号电荷的传输方向垂直地交替配置，其中心部分与信号电荷的传输方向相反地交替布置。