公开(公告)号：US07675091B2

公开(公告)日：2010-03-09

申请号：US11463137

申请日：2006-08-08

申请人： Young-Soo Park ,  Kyoo-Chul Cho ,  Shin-Hyeok Han ,  Tae-Soo Kang

发明人： Young-Soo Park ,  Kyoo-Chul Cho ,  Shin-Hyeok Han ,  Tae-Soo Kang

IPC分类号： H01L29/80

CPC分类号： H01L29/045 ,  H01L21/76251 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78687 ,  H01L29/78696

摘要： Disclosed is a semiconductor wafer and method of fabricating the same. The semiconductor wafer is comprised of a semiconductor layer formed on an insulation layer on a base substrate. The semiconductor layer includes a surface region organized in a first crystallographic orientation, and another surface region organized in a second crystallographic orientation. The performance of a semiconductor device with unit elements that use charges, which are activated in high mobility to the crystallographic orientation, as carriers is enhanced. The semiconductor wafer is completed by forming the semiconductor layer with the second crystallographic orientation on the plane of the first crystallographic orientation, growing an epitaxial layer, forming the insulation layer on the epitaxial layer, and then bonding the insulation layer to the base substrate.

摘要翻译： 公开了半导体晶片及其制造方法。 半导体晶片由在基底基板上的绝缘层上形成的半导体层构成。 半导体层包括以第一晶体取向组织的表面区域和以第二晶体取向组织的另一表面区域。 带有单元元件的半导体器件的性能随着载流子的增强而被使用以高结晶取向的高迁移率激活的电荷。 半导体晶片通过在第一晶体取向的平面上形成具有第二晶体取向的半导体层，生长外延层，在外延层上形成绝缘层，然后将绝缘层接合到基底来完成。

公开(公告)号：US07372150B2

公开(公告)日：2008-05-13

申请号：US10684343

申请日：2003-10-10

申请人： Sam-Jong Choi ,  Gi-Jung Kim ,  Kyoo-Chul Cho ,  Yeon-Sook Kim ,  Shin-Hyeok Han ,  Hoe-Sik Chung

发明人： Sam-Jong Choi ,  Gi-Jung Kim ,  Kyoo-Chul Cho ,  Yeon-Sook Kim ,  Shin-Hyeok Han ,  Hoe-Sik Chung

IPC分类号： H01L23/04

CPC分类号： H01L23/544 ,  H01L29/0657 ,  H01L2223/54406 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor wafer including an identification indication is provided. The wafer includes a convex edge with an upper surface area and a lower surface area. The identification indication is in a marking region which is disposed on a lower side surface of the convex edge. The lower side surface has a wide region where the marking region is located. This wide region has a width that is wider than an upper side surface of the wafer and thus makes a cross-section of a side of the wafer asymmetrical. With the present invention, the entire top surface of the semiconductor wafer can be utilized for a semiconductor chip region and prevents manufacturing problems associated with the uneven nature of the identification indication when the identification is located on the top surface of the wafer.

摘要翻译： 提供了包括识别指示的半导体晶片。 晶片包括具有上表面区域和下表面区域的凸边缘。 识别指示位于设置在凸缘的下侧表面上的标记区域中。 下侧表面具有标记区域所在的宽区域。 该宽区域的宽度比晶片的上侧面宽，因此晶片侧面的截面不对称。 利用本发明，半导体晶片的整个顶表面可以用于半导体芯片区域，并且当识别位于晶片的顶表面上时，可防止与识别指示的不均匀性有关的制造问题。