摘要:
An overvoltage protection device for compound semiconductor field effect transistors includes an implanted region disposed in a compound semiconductor material. The implanted region has spatially distributed trap states which cause the implanted region to become electrically conductive at a threshold voltage. A first contact is connected to the implanted region. A second contact spaced apart from the first contact is also connected to the implanted region. The distance between the first and second contacts partly determines the threshold voltage of the overvoltage protection device.
摘要:
An illumination module includes a light bar, an LED assembly, a positioning member, a sleeve and a lamp receptacle. The light bar has a first end and a second end opposite the first end. A microstructure layer or a reflective layer is formed on the light bar, and a positioning pillar is formed on an outer side of the light bar. The emitting light of the LED assembly is diffused by the microstructure layer or reflected by the reflective layer to spread over the entire light bar. The positioning member, the sleeve, the LED assembly or the lamp receptacle has at least one guide slot that engages with the positioning pillar of the light bar.
摘要:
An illumination module includes a light bar, an LED assembly, a positioning member, a sleeve and a lamp receptacle. The light bar has a first end and a second end opposite the first end. A microstructure layer or a reflective layer is formed on the light bar, and a positioning pillar is formed on an outer side of the light bar. The emitting light of the LED assembly is diffused by the microstructure layer or reflected by the reflective layer to spread over the entire light bar. The positioning member, the sleeve, the LED assembly or the lamp receptacle has at least one guide slot that engages with the positioning pillar of the light bar.
摘要:
The invention is disclosed that pattern on semiconductor substrate is fabricated by thermal reflow technique. Also, the pattern on semiconductor substrate having different sub-micron spacings can be fabricated by using different time for the thermal reflow technique process.