公开(公告)号：US20240359991A1

公开(公告)日：2024-10-31

申请号：US18770677

申请日：2024-07-12

Applicant: GlobalWafers Co., Ltd.

Inventor： Ching-Shan Lin

IPC: C01B32/956 ,  C23C14/06 ,  C23C14/58 ,  C30B29/36 ,  C30B33/02 ,  H01L29/16

CPC classification number: C01B32/956 ,  C23C14/0635 ,  C23C14/5806 ,  C30B29/36 ,  C30B33/02 ,  C01P2006/40 ,  H01L29/1608

Abstract: A method of fabricating a silicon carbide material is provided. The method includes the following steps. A first annealing process is performed on a wafer or on an ingot that forms the wafer after wafer slicing. The conditions of the first annealing process include: a heating rate of 10° C./minute to 30° C./minute, an annealing temperature of 2000° C. or less, and a constant temperature annealing time of 2 minutes or more and 4 hours or less for performing the first annealing process. After performing the first annealing process, an average resistivity of the wafer or the ingot is greater than 1010Ω·cm.

公开(公告)号：US20240352622A1

公开(公告)日：2024-10-24

申请号：US18762896

申请日：2024-07-03

Applicant: Wolfspeed, Inc.

Inventor： Yuri Khlebnikov ,  Varad R. Sakhalkar ,  Caleb A. Kent ,  Valeri F. Tsvetkov ,  Michael J. Paisley ,  Oleksandr Kramarenko ,  Matthew David Conrad ,  Eugene Deyneka ,  Steven Griffiths ,  Simon Bubel ,  Adrian R. Powell ,  Robert Tyler Leonard ,  Elif Balkas ,  Jeffrey C. Seaman

IPC: C30B29/36 ,  C30B23/02 ,  C30B23/06 ,  C30B31/22 ,  C30B33/02 ,  H01L21/04

CPC classification number: C30B29/36 ,  C30B23/02 ,  C30B23/063 ,  C30B23/066 ,  C30B31/22 ,  C30B33/02 ,  H01L21/0475

Abstract: Silicon carbide (SiC) wafers and related methods are disclosed that include large diameter SiC wafers with wafer shape characteristics suitable for semiconductor manufacturing. Large diameter SiC wafers are disclosed that have reduced deformation related to stress and strain effects associated with forming such SiC wafers. As described herein, wafer shape and flatness characteristics may be improved by reducing crystallographic stress profiles during growth of SiC crystal boules or ingots. Wafer shape and flatness characteristics may also be improved after individual SiC wafers have been separated from corresponding SiC crystal boules. In this regard, SiC wafers and related methods are disclosed that include large diameter SiC wafers with suitable crystal quality and wafer shape characteristics including low values for wafer bow, warp, and thickness variation.

公开(公告)号：US20240352617A1

公开(公告)日：2024-10-24

申请号：US18760286

申请日：2024-07-01

Applicant: II-VI ADVANCED MATERIALS, LLC

Inventor： Ilya ZWIEBACK ,  Varatharajan RENGARAJAN ,  Andrew E. Souzis ,  Gary Ruland

IPC: C30B23/02 ,  C01B32/956 ,  C04B35/573 ,  C04B35/65 ,  C30B29/36 ,  G02F1/00 ,  H01L29/36

CPC classification number: C30B23/02 ,  C01B32/956 ,  C04B35/573 ,  C04B35/65 ,  C30B29/36 ,  C04B2235/3205 ,  C04B2235/3826 ,  C04B2235/3839 ,  C04B2235/425 ,  C04B2235/722 ,  C04B2235/76 ,  C04B2235/9661 ,  G02F1/0063 ,  H01L29/36

Abstract: An optical device includes a vanadium compensated, high resistivity, SiC single crystal of 6H or 4H polytype, for transmitting light having a wavelength in a range of from 420 nm to 4.5 μm. The device may include a window, lens, prism, or waveguide. A system includes a source for generating light having a wavelength in a range of from 420 nm to 4.5 μm, and a device for receiving and transmitting the light, where the device includes a vanadium compensated, high resistivity, SiC single crystal of 6H or 4H polytype. The disclosure also relates to crystals and methods for optical applications, including an aluminum doped SiC crystal having residual nitrogen and boron impurities, where the aluminum concentration is greater than the combined concentrations of nitrogen and boron, and where an optical absorption coefficient is less than about 0.4 cm−1 at a wavelength between about 400 nm to about 800 nm.

公开(公告)号：US12125701B2

公开(公告)日：2024-10-22

申请号：US17121863

申请日：2020-12-15

Applicant: Wolfspeed, Inc.

Inventor： Yuri Khlebnikov ,  Varad R. Sakhalkar ,  Caleb A. Kent ,  Valeri F. Tsvetkov ,  Michael J. Paisley ,  Oleksandr Kramarenko ,  Matthew David Conrad ,  Eugene Deyneka ,  Steven Griffiths ,  Simon Bubel ,  Adrian R. Powell ,  Robert Tyler Leonard ,  Elif Balkas ,  Curt Progl ,  Michael Fusco ,  Alexander Shveyd ,  Kathy Doverspike ,  Lukas Nattermann

IPC: C30B29/36 ,  C30B23/02 ,  H01L21/02 ,  C30B23/00

CPC classification number: H01L21/02378 ,  C30B23/02 ,  C30B29/36 ,  H01L21/0242 ,  C30B23/005

Abstract: Silicon carbide (SiC) materials including SiC wafers and SiC boules and related methods are disclosed that provide large dimension SiC wafers with reduced crystallographic stress. Growth conditions for SiC materials include maintaining a generally convex growth surface of SiC crystals, adjusting differences in front-side to back-side thermal profiles of growing SiC crystals, supplying sufficient source flux to allow commercially viable growth rates for SiC crystals, and reducing the inclusion of contaminants or non-SiC particles in SiC source materials and corresponding SiC crystals. By forming larger dimension SiC crystals that exhibit lower crystallographic stress, overall dislocation densities that are associated with missing or additional planes of atoms may be reduced, thereby improving crystal quality and usable SiC crystal growth heights.

公开(公告)号：US12116696B2

公开(公告)日：2024-10-15

申请号：US18291816

申请日：2022-06-28

Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.

Inventor： Hiroki Takaoka ,  Shunsaku Ueta

IPC: C30B29/36 ,  C01B32/956 ,  C30B23/06

CPC classification number: C30B29/36 ,  C01B32/956 ,  C30B23/063

Abstract: A silicon carbide substrate includes a dopant. The silicon carbide substrate has, on an off-downstream side with respect to a center of the silicon carbide substrate in plan view, a portion having a resistivity lower than a resistivity at the center of the silicon carbide substrate in plan view. A value obtained by dividing a difference between the resistivity of the silicon carbide substrate at the center of the silicon carbide substrate in plan view and a minimum resistivity of the silicon carbide substrate on the off-downstream side with respect to the center of the silicon carbide substrate in plan view by the resistivity of the silicon carbide substrate at the center of the silicon carbide substrate in plan view is 0.015 or less. The resistivity of the silicon carbide substrate increases from a position at which the silicon carbide substrate has the minimum resistivity toward the off-downstream side.

公开(公告)号：US20240337044A1

公开(公告)日：2024-10-10

申请号：US18435218

申请日：2024-02-07

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： NOBUYUKI OYA ,  TAKESHI OKAMOTO ,  AKIYOSHI HORIAI

IPC: C30B23/00 ,  C30B29/36

CPC classification number: C30B23/002 ,  C30B29/36

Abstract: A silicon carbide single crystal includes a region in which a change of a specific resistance is repeated in a growth direction of the silicon carbide single crystal, and the change of the specific resistance is a gradual increase and decrease of the specific resistance. A changing range of the specific resistance may be within a range from 0.5% to 50% inclusive. A changing period of the gradual increase and decrease of the specific resistance that is repeated may be 500 μm or less in terms of a length of the silicon carbide single crystal.

公开(公告)号：US12104278B2

公开(公告)日：2024-10-01

申请号：US17611138

申请日：2020-03-19

Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.

Inventor： Tsubasa Honke ,  Kyoko Okita

IPC: C30B29/06 ,  C30B29/36 ,  C30B29/64 ,  C30B33/00 ,  H01L21/02 ,  H01L29/16 ,  H01L29/36 ,  C09G1/02 ,  C09G1/04 ,  C30B23/00 ,  C30B23/02

CPC classification number: C30B29/36 ,  C30B29/06 ,  C30B33/00 ,  H01L21/02021 ,  H01L21/02024 ,  H01L21/02052 ,  H01L29/1608 ,  H01L29/36 ,  C09G1/02 ,  C09G1/04 ,  C30B23/00 ,  C30B23/02 ,  C30B23/025 ,  C30B29/64 ,  H01L21/02019 ,  H01L21/02378 ,  H01L21/02529 ,  Y10T428/219 ,  Y10T428/24355 ,  Y10T428/24777 ,  Y10T428/24942 ,  Y10T428/31

Abstract: A silicon carbide substrate has a first main surface, a second main surface, and a chamfered portion. The second main surface is opposite to the first main surface. The chamfered portion is contiguous to each of the first main surface and the second main surface. The silicon carbide substrate has a maximum diameter of 150 mm or more. A surface manganese concentration in the chamfered portion is 1×1011 atoms/cm2 or less.

公开(公告)号：US20240318352A1

公开(公告)日：2024-09-26

申请号：US18598090

申请日：2024-03-07

Applicant: SiCrystal GmbH

Inventor： Bernhard Ecker ,  Maximilian Kowasch ,  Ralf Müller ,  Philipp Schuh ,  Matthias Stockmeier ,  Daisuke Takegawa ,  Michael Vogel ,  Arnd-Dietrich Weber

IPC: C30B33/02 ,  C30B29/36 ,  F27B17/00 ,  F27D5/00

CPC classification number: C30B33/02 ,  C30B29/36 ,  F27B17/0016 ,  F27D5/0037

Abstract: Thermal post-treatment of a silicon carbide (SiC) volume monocrystal which has a substantially cylindrical basic shape with a crystal length in an axial direction, a crystal diameter in a radial direction, a crystal central longitudinal axis extending in the axial direction, and with three boundary surfaces, namely, a bottom surface, a top surface and a circumferential edge surface. The SiC volume monocrystal is brought to a post-treatment temperature in order to reduce mechanical stresses present in the SiC volume monocrystal after completion of the previous growth, wherein an inhomogeneous temperature profile with a radial thermal gradient is set in the SiC volume monocrystal, which rises continuously from the crystal central longitudinal axis to the circumferential edge surface, and a heat exchange of the SiC volume monocrystal with a surrounding free space takes place via free heat radiation on at least two of the three boundary surfaces.

公开(公告)号：US12098476B2

公开(公告)日：2024-09-24

申请号：US17633118

申请日：2020-08-05

Applicant: KWANSEI GAKUIN EDUCATIONAL FOUNDATION ,  TOYOTA TSUSHO CORPORATION

Inventor： Tadaaki Kaneko ,  Kiyoshi Kojima

IPC: C30B23/06 ,  C30B25/18 ,  C30B25/20 ,  C30B29/36 ,  C30B33/04

CPC classification number: C30B25/20 ,  C30B25/186 ,  C30B29/36 ,  C30B33/04

Abstract: The present invention addresses the problem of providing a novel SiC substrate production method. The SiC substrate production method according to the present invention comprises an etching step S10 of etching a SiC base substrate 10, a crystal growth step S20 of growing a SiC substrate layer 13 on the SiC base substrate 10 to produce a SiC substrate body 20, and a peeling step S30 of peeling at least a portion of the SiC substrate body 20 to produce a SiC substrate 30, the method being characterized in that each of the etching step S10 and the crystal growth step S20 is a step of arranging the SiC base substrate 10 and a SiC material 40 so as to face each other and heating the SiC base substrate 10 and the SiC material 40 so as to form a temperature gradient between the SiC base substrate 10 and the SiC material 40.

公开(公告)号：US12091772B2

公开(公告)日：2024-09-17

申请号：US16971814

申请日：2018-10-29

Applicant: Sumitomo Electric Industries, Ltd.

Inventor： Kyoko Okita ,  Tsubasa Honke

IPC: C30B29/36 ,  C30B23/02 ,  H01L21/02 ,  H01L21/306 ,  H01L29/16

CPC classification number: C30B29/36 ,  C30B23/025 ,  H01L21/02378 ,  H01L21/30625 ,  H01L29/1608

Abstract: A silicon carbide substrate according to the present disclosure is a silicon carbide substrate that includes a first main surface and a second main surface opposite to the first main surface, and is made of silicon carbide having a polytype of 4H. The first main surface has a maximum diameter of more than or equal to 140 mm. The first main surface is a {0001} plane or a plane inclined at an off angle of more than 0° and less than or equal to 8° relative to the {0001} plane. Half-widths of a peak corresponding to a folded mode of a longitudinal optical branch of a Raman spectrum of the silicon carbide substrate within a plane of the first main surface have an average value of less than 2.5 cm−1, and a standard deviation of less than or equal to 0.06 cm−1.