公开(公告)号：US07743199B2

公开(公告)日：2010-06-22

申请号：US12108158

申请日：2008-04-23

申请人： Zhang Gang ,  Yasuteru Kohda ,  Nobuyuki Ohba ,  Kohji Takano

发明人： Zhang Gang ,  Yasuteru Kohda ,  Nobuyuki Ohba ,  Kohji Takano

IPC分类号： G06F13/00 ,  G01R31/28

CPC分类号： G06F11/349 ,  G06F11/3485

摘要： An integrated bus architecture for transmitting trace information from a plurality of processors included on an integrated chip having one or more peripheral I/O channels comprises a segmented bus having a plurality of segments arranged in a ring topology and configured to transmit trace information in a circular pathway from upstream segments to downstream segments, and one or more trace output circuits each connected to a respective segment and each including a switch configured to be dynamically toggled between enabled and disabled states. The plurality of segments includes a respective segment for each processor having a coupling unit connected to a trace port of the processor. The coupling unit is configured to receive trace information from the trace port, to receive trace information from the adjacent upstream segment, and to transmit items of trace information to the adjacent downstream segment. Each trace output circuit is configured to transmit trace information to a respective peripheral I/O channel when in the enabled state. Each trace output circuit is configured to transmit trace information to the adjacent downstream segment when in the disabled state.

摘要翻译： 用于从包括在具有一个或多个外设I / O通道的集成芯片上的多个处理器发送跟踪信息的集成总线架构包括分段总线，其具有以环形拓扑布置的多个段，并且被配置为以圆形方式传送跟踪信息 路径从上游段到下游段，以及一个或多个跟踪输出电路，每个跟踪输出电路各自连接到相应的段，并且每个跟踪输出电路都包括被配置为在启用和禁用状态之间动态切换的交换机 多个段包括用于每个处理器的相应段，其具有连接到处理器的跟踪端口的耦合单元。 耦合单元被配置为从跟踪端口接收跟踪信息，以从相邻的上游段接收跟踪信息，并将跟踪信息的项目发送到相邻的下游段。 每个跟踪输出电路被配置为当处于使能状态时将跟踪信息发送到相应的外设I / O通道。 每个跟踪输出电路被配置为当处于禁用状态时将跟踪信息发送到相邻的下游段。